Revert MMIO space writes on shutdown as needed
Reversible MMIO space writes now use rmmio_write*().
Reversible PCI MMIO space writes now use pci_rmmio_write*().
If a MMIO value needs to be queued for restore without writing it,
use rmmio_val*().
MMIO space writes which are one-shot (e.g. communication with some chip)
should continue to use the permanent mmio_write* variants.
Corresponding to flashrom svn r1292.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
David tested it successfully on some NM10/ICH7 platforms which switch
between SPI and LPC targets (x86 BIOS ROM vs. EC firmware ROM).
Acked-by: David Hendricks <dhendrix@google.com>
diff --git a/satamv.c b/satamv.c
index 2e5af6c..0c0dace 100644
--- a/satamv.c
+++ b/satamv.c
@@ -102,8 +102,7 @@
msg_pspew("BAR2Sz=0x%01x\n", (tmp >> 19) & 0x7);
tmp &= 0xffffffc0;
tmp |= 0x0000001f;
- /* FIXME: This needs to be an auto-reversible write. */
- pci_mmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL);
+ pci_rmmio_writel(tmp, mv_bar + PCI_BAR2_CONTROL);
/* Enable flash: GPIO Port Control Register 0x104f0 */
tmp = pci_mmio_readl(mv_bar + GPIO_PORT_CONTROL);
@@ -114,8 +113,7 @@
"values!\n");
tmp &= 0xfffffffc;
tmp |= 0x2;
- /* FIXME: This needs to be an auto-reversible write. */
- pci_mmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL);
+ pci_rmmio_writel(tmp, mv_bar + GPIO_PORT_CONTROL);
/* Get I/O BAR location. */
tmp = pci_read_long(pcidev_dev, PCI_BASE_ADDRESS_2) &