)]}'
{
  "commit": "4c7ea385814ef9e5db25659cfb165da78f96fa79",
  "tree": "2682c30d81fd33d2c4350801eacf915ccb3aba48",
  "parents": [
    "6d5d2535a4807352bd7b60650a6c0a76a5cc6b14"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Mon Aug 10 23:30:45 2009 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Mon Aug 10 23:30:45 2009 +0000"
  },
  "message": "Add ICH6,ICH7,ICH8,ICH9,ICH10 FWH IDSEL settings and flash decode settings to the debug output\n\nThis can help debug cases where the BIOS does not set up a correct flash\ndecode for the given flash size. The Intel docs state that the decode\napplies to FWH and SPI flash.\n\nCorresponding to flashrom svn r675.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Chris Kinney \u003ccmkinne@sandia.gov\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b859be8c4358f9104852477825976873a47e2060",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "2bf92047baeb471e7e975e9d762dffaa1f3ba1ff",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}