tree ceb3d304075fadbe31ed8d0d25dc8d4b8b8e60fb
parent b1d2baea270c1177a78d1672b4f8dd42ed246eb4
author Nico Huber <nico.h@gmx.de> 1721514149 +0200
committer Nico Huber <nico.h@gmx.de> 1721642927 +0000

spi25_statusreg: Allow to write (non-)volatile bits specifically

There's a subtle difference between prepending a write-status-register
command with a write enable (WREN)  or an enable write status register
(EWSR): The former targets non-volatile bits, while the latter targets
volatile bits, i.e. register bits that do not survive a reset.

Sometimes bits are implemented as both volatile and non-volatile. Then,
the non-volatile state is loaded into the volatile registers after chip
reset, and writes with a WREN target both.  So far, we simply used WREN
when possible.  This can, however, lead to unnecessary wear of the non-
volatile bits. Flash datasheets do not mention any maximum write cycles
for them. However, it is unclear if this is an academic issue, i.e. the
manufacturers account for the wear and implement redundancy, or if they
simply don't expect that many configuration changes.

For a start, allow to specify explicitly which kind of register bits we
want to write. We keep the current behavior. However, the logic to dis-
able block protections automatically should be revised  to prefer vola-
tile writes.

Change-Id: I807a2c48f4eaa85d5a10b37362e71818359a4c93
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/190
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>