)]}'
{
  "commit": "4ac536bde43a1d64e11034cab34aabd7a6efd5dc",
  "tree": "ceb3d304075fadbe31ed8d0d25dc8d4b8b8e60fb",
  "parents": [
    "b1d2baea270c1177a78d1672b4f8dd42ed246eb4"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Jul 21 00:22:29 2024 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Mon Jul 22 10:08:47 2024 +0000"
  },
  "message": "spi25_statusreg: Allow to write (non-)volatile bits specifically\n\nThere\u0027s a subtle difference between prepending a write-status-register\ncommand with a write enable (WREN)  or an enable write status register\n(EWSR): The former targets non-volatile bits, while the latter targets\nvolatile bits, i.e. register bits that do not survive a reset.\n\nSometimes bits are implemented as both volatile and non-volatile. Then,\nthe non-volatile state is loaded into the volatile registers after chip\nreset, and writes with a WREN target both.  So far, we simply used WREN\nwhen possible.  This can, however, lead to unnecessary wear of the non-\nvolatile bits. Flash datasheets do not mention any maximum write cycles\nfor them. However, it is unclear if this is an academic issue, i.e. the\nmanufacturers account for the wear and implement redundancy, or if they\nsimply don\u0027t expect that many configuration changes.\n\nFor a start, allow to specify explicitly which kind of register bits we\nwant to write. We keep the current behavior. However, the logic to dis-\nable block protections automatically should be revised  to prefer vola-\ntile writes.\n\nChange-Id: I807a2c48f4eaa85d5a10b37362e71818359a4c93\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/190\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "94db44bd3800a3096fa84a22a45beb48f7e02594",
      "old_mode": 33188,
      "old_path": "include/chipdrivers.h",
      "new_id": "b38ac5567b6a9419f5081c76c828d70b47bfceb1",
      "new_mode": 33188,
      "new_path": "include/chipdrivers.h"
    },
    {
      "type": "modify",
      "old_id": "24bef6c41b8a2031d68d592c3a8a06c0f138aff5",
      "old_mode": 33188,
      "old_path": "spi25_statusreg.c",
      "new_id": "8d5e5255bb144ff793bb00f56183b43935f8a884",
      "new_mode": 33188,
      "new_path": "spi25_statusreg.c"
    },
    {
      "type": "modify",
      "old_id": "542451890aba01703a494cc159676d40c958bd41",
      "old_mode": 33188,
      "old_path": "writeprotect.c",
      "new_id": "302451beb96166ad80938633887fee68c2cf5a07",
      "new_mode": 33188,
      "new_path": "writeprotect.c"
    }
  ]
}