tree fb7ab264b5a252ffee6aec466827c2e1da8ff22f
parent fc52409252eb3f6f05547cf28b0e44793a39a6a4
author Nikolay Petukhov <nikolay.petukhov@gmail.com> 1210986538 +0000
committer Peter Stuge <peter@stuge.se> 1210986538 +0000

Support Pm49FL004/2 Block Locking Registers

The PMC chips understand both LPC and FWH flash commands. When in FWH mode
(MSR_DIVIL_BALL_OPT(0x51400015) = 0x00000f7d on 5536 boards) the Block
Locking Registers by default lock the flash chip for write and erase - in
addition to any chipset write protection.

This patch adds unlock operations before Pm49FL004/2 write and erase, and
it includes an svn mv pm49fl004.c pm49fl00x.c

Thanks go to Nikolay for this patch.

Corresponding to flashrom svn r243 and coreboot v2 svn r3332.

Signed-off-by: Nikolay Petukhov <nikolay.petukhov@gmail.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Bari Ari <bari@onelabs.com>