)]}'
{
  "commit": "4760b6ec1f7fbcee1bf238a25e3df56a86327a5a",
  "tree": "a4c3762b1228f901f62d40b53ed1a953b25926b4",
  "parents": [
    "0c9af0a639bf9180839d548f91547b58de921ca9"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sat Jan 06 23:45:28 2024 +0100"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Mon Jul 22 10:08:47 2024 +0000"
  },
  "message": "spi25: Implement multi-i/o reads\n\nWe describe a read operation in a new  `struct spi_read_op`. It\u0027s\ncomprised of the i/o mode, its opcode, an optional mode byte, and\nthe number of dummy bytes.\n\nBased on this information  about the various read operations, and\nthe flash and master feature flags,  we select the read operation\nwith the highest throughput.\n\nThe following assumption is made about 4BA chips: When it supports\nnative-4BA fast reads  and a multi-i/o version of the regular fast\nread, then it should also support the respective native-4BA, multi-\ni/o version (yes, JEDEC, there are too many read commands!). So far\nthis seems to hold for the chips in our database.\n\nChange-Id: I3c93e71d85f769831d637c14d3571f7ddb54d8b2\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/49\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\n",
  "tree_diff": [
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      "new_path": "include/spi.h"
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