spi25: Implement multi-i/o reads
We describe a read operation in a new `struct spi_read_op`. It's
comprised of the i/o mode, its opcode, an optional mode byte, and
the number of dummy bytes.
Based on this information about the various read operations, and
the flash and master feature flags, we select the read operation
with the highest throughput.
The following assumption is made about 4BA chips: When it supports
native-4BA fast reads and a multi-i/o version of the regular fast
read, then it should also support the respective native-4BA, multi-
i/o version (yes, JEDEC, there are too many read commands!). So far
this seems to hold for the chips in our database.
Change-Id: I3c93e71d85f769831d637c14d3571f7ddb54d8b2
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/49
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/spi.c b/spi.c
index 48e86ec..de7965f 100644
--- a/spi.c
+++ b/spi.c
@@ -173,6 +173,15 @@
return ERROR_FLASHPROG_BUG;
}
+ if ((mst->features & (SPI_MASTER_DUAL | SPI_MASTER_QUAD | SPI_MASTER_DTR_IN)) &&
+ mst->read == default_spi_read && mst->multicommand == default_spi_send_multicommand) {
+ msg_perr("%s called with incomplete master definition.\n"
+ "Dual/quad I/O and DTR require multicommand or custom read function.\n"
+ "Please report a bug at flashprog@flashprog.org\n",
+ __func__);
+ return ERROR_FLASHPROG_BUG;
+ }
+
if (max_rom_decode)
rmst.max_rom_decode = max_rom_decode;
else