diff --git a/en29f002a.c b/en29f002a.c
index e2b4f9b..904b58b 100644
--- a/en29f002a.c
+++ b/en29f002a.c
@@ -19,12 +19,17 @@
  */
 
 /*
-   EN29F512 has 1C,21
-   EN29F010 has 1C,20
-   EN29F040A has 1C,04
-   EN29LV010 has 1C,6E and uses short F0 reset sequence
-   EN29LV040(A) has 1C,4F and uses short F0 reset sequence
+ * EN29F512 has 1C,21
+ * EN29F010 has 1C,20
+ * EN29F040A has 1C,04
+ * EN29LV010 has 1C,6E and uses short F0 reset sequence
+ * EN29LV040(A) has 1C,4F and uses short F0 reset sequence
  */
+
+#include <stdio.h>
+#include <stdint.h>
+#include "flash.h"
+
 int probe_en29f512(struct flashchip *flash)
 {
 	volatile uint8_t *bios = flash->virtual_memory;
@@ -53,9 +58,11 @@
 }
 
 /*
-   EN29F002AT has 1C,92
-   EN29F002AB has 1C,97
+ * EN29F002AT has 1C,92
+ * EN29F002AB has 1C,97
  */
+
+/* This does not seem to function properly for EN29F002NT. */
 int probe_en29f002a(struct flashchip *flash)
 {
 	volatile uint8_t *bios = flash->virtual_memory;
@@ -83,3 +90,35 @@
 	return 0;
 }
 
+/* The EN29F002 chip needs repeated single byte writing, no block writing. */
+int write_en29f002a(struct flashchip *flash, uint8_t *buf)
+{
+	int i;
+	int total_size = flash->total_size * 1024;
+	volatile uint8_t *bios = flash->virtual_memory;
+	volatile uint8_t *dst = bios;
+
+	// *bios = 0xF0;
+	myusec_delay(10);
+	erase_chip_jedec(flash);
+
+	printf("Programming page: ");
+	for (i = 0; i < total_size; i++) {
+		/* write to the sector */
+		if ((i & 0xfff) == 0)
+			printf("address: 0x%08lx", (unsigned long)i);
+		*(bios + 0x5555) = 0xAA;
+		*(bios + 0x2AAA) = 0x55;
+		*(bios + 0x5555) = 0xA0;
+		*dst++ = *buf++;
+
+		/* wait for Toggle bit ready */
+		toggle_ready_jedec(dst);
+
+		if ((i & 0xfff) == 0)
+			printf("\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b\b");
+	}
+
+	printf("\n");
+	return 0;
+}