)]}'
{
  "commit": "42882fd97e404952269e84a762d2304964a72899",
  "tree": "a74a6b18258bf2dc80d0726ce420fe3cb061ac9a",
  "parents": [
    "691568bf2f987e153abc69b2268a4e2bd2cb2286"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Wed Apr 22 13:33:43 2009 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Wed Apr 22 13:33:43 2009 +0000"
  },
  "message": "All \"unknown xy SPI chip\" entries claim to have status UNTESTED for probe/read/erase/write\n\nThat is incorrect.\n\nA bit of confusion comes from how the #defines are named. We call them\nTEST_BAD_*, but the message printed by flashrom says: \"This flash part\nhas status NOT WORKING for operations:\"\n\nSomething that is unimplemented is definitely not working.\n\nNeither of the chip entries mentioned above has erase or write functions\nimplemented, so erase and write are not working. Since their size is\nunknown, we can\u0027t read them in. That means read is not working as well.\nProbing is a different matter. If a chip-specific probe function had\nmatched, we wouldn\u0027t have to handle the chip with the \"unknown xy SPI\nchip\" fallback. I\u0027m tempted to call that \"not working\" as well, but I\u0027m\nopen to discussion on this point.\n\nCorresponding to flashrom svn r439 and coreboot v2 svn r4177.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "911457f228322be6ec4f5c0d490c5347a3d00ae7",
      "old_mode": 33188,
      "old_path": "flashchips.c",
      "new_id": "bc16b2e455ae1f060a547d954e4d572252ff0c7d",
      "new_mode": 33188,
      "new_path": "flashchips.c"
    }
  ]
}