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review.sourcearcade.org / flashprog / 10693353eef0cddcfb844c318363da787f69e023
commit10693353eef0cddcfb844c318363da787f69e023[log] [tgz]
authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Sun Jun 29 10:57:13 2008 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>Sun Jun 29 10:57:13 2008 +0000
treecce5da83fc71703c0eae833f9a992437d13e3a55
parent7e2c079367fb2b9eb298b51a102ab40a70e79332 [diff]
Add a debug marker after ICH SPI opcode programming

Corresponding to flashrom svn r281 and coreboot v2 svn r3397.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
1 file changed
tree: cce5da83fc71703c0eae833f9a992437d13e3a55
  1. 82802ab.c
  2. am29f040b.c
  3. board_enable.c
  4. cbtable.c
  5. chipset_enable.c
  6. COPYING
  7. coreboot_tables.h
  8. en29f002a.c
  9. flash.h
  10. flashchips.c
  11. flashrom.8
  12. flashrom.c
  13. ichspi.c
  14. it87spi.c
  15. jedec.c
  16. layout.c
  17. m29f400bt.c
  18. Makefile
  19. mx29f002.c
  20. pm49fl00x.c
  21. README
  22. sharplhf00l04.c
  23. spi.c
  24. spi.h
  25. sst28sf040.c
  26. sst39sf020.c
  27. sst49lf040.c
  28. sst49lfxxxc.c
  29. sst_fwhub.c
  30. stm50flw0x0x.c
  31. udelay.c
  32. w29ee011.c
  33. w39v080fa.c
  34. w49f002u.c