)]}'
{
  "commit": "39687acc6bf41b955a11e8a8fa3f0029342cbb3e",
  "tree": "36f702391d17eae36554a2064297284a14cbc10b",
  "parents": [
    "081ffbae47cbebda5611de101b9dd53b3a58b6bb"
  ],
  "author": {
    "name": "Sergii Dmytruk",
    "email": "sergii.dmytruk@3mdeb.com",
    "time": "Mon Jul 25 00:23:25 2022 +0300"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Fri Dec 30 01:16:55 2022 +0100"
  },
  "message": "writeprotect_ranges.c: add more range functions\n\nNot all chips follow the same pattern. There are differences in how CMP\nbit is treated or in block size used.\n\nChange-Id: Ied7b27be2ee2426af8f473432e2b01a290de2365\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/66212\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nOriginal-Reviewed-by: Anastasia Klimchuk \u003caklm@chromium.org\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71008\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "149620a4103cccc739403bfbd78c041a105c4205",
      "old_mode": 33188,
      "old_path": "chipdrivers.h",
      "new_id": "6b3a334bdab735ee9a2fab3285b209eaf8ffe1c8",
      "new_mode": 33188,
      "new_path": "chipdrivers.h"
    },
    {
      "type": "modify",
      "old_id": "04e38811dc452c04730dc20e4934fd2a5e2d0352",
      "old_mode": 33188,
      "old_path": "writeprotect_ranges.c",
      "new_id": "d15ba5ded488a98a776f915034e32e460a4aba05",
      "new_mode": 33188,
      "new_path": "writeprotect_ranges.c"
    }
  ]
}