tree 86f865121240490c8de65884016592be38b6d312
parent 2cadbe3481ec133b91b33f985f54ed0828559e15
author Nico Huber <nico.h@gmx.de> 1772899499 +0100
committer Nico Huber <nico.h@gmx.de> 1782638977 +0000

Use bus probing for standard JEDEC and JEDEC_29GL

To keep things close to as they were, we still run the probing many
times, with a huge amount of different chip parameters and sizes.

This brings us down to 35 probing runs for 159 chips.  And there is
still room for improvement:  It's likely that chips respond already
when longer delays are used. Also, many chips actually ignore addi-
tional address bits when decoding commands (i.e. bits above a 0x555
pattern are simply ignored and we actually don't need the masking).
Many (if not all) parallel flash chips also don't care about higher
address bits when reading the identification, so we might only have
to probe for them with a single chip size.

For now, we keep the set of probing parameters close to what we did
before. For power-of-two chip sizes from 64KiB to 1MiB, we run with
the most common parameters. 7 more parameter sets are used for more
unusual cases. And the 29GL parts are probed for the three sizes we
have in our database: 4MiB, 8MiB, 16MiB.

A note on the 29GL probing: All the chips have status UNTESTED, and
most if not all are x16 parts that need the addresses shifted (what
we don't do ATM). Overall it looks like standard jedec probing with
a short reset sequence. However, continuations of the device ID are
always 2 bytes long, at a different offset (0x0E) and prefixed with
0x7E.

Change-Id: If6ece7edc2291cae4824e5bcc2f83fd8aaef296e
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/444