)]}'
{
  "commit": "2a9e2455cd4f9b9fc5421e9b6b786a9010daf934",
  "tree": "017b795c2d6162201b952ae400edabfd3be04fba",
  "parents": [
    "c12fc71f74530902c04ea3a2c158d872d2b4ffea"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Thu Dec 17 15:20:01 2009 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Thu Dec 17 15:20:01 2009 +0000"
  },
  "message": "Use the maximum decode size infrastructure\n\n- Detect max FWH size for Intel\n  631xESB/632xESB/3100/ICH6/ICH7/ICH8/ICH9/ICH10.\n- Move IDSEL override before decode size checking for the chipsets\n  listed above or flashrom will complain based on old values.\n- Adjust supported flash buses for the chipsets listed above (none of\n  them supports LPC or Parallel).\n- Detect max parallel size for AMD/National Semiconductor CS5530.\n- Adjust supported flash buses for CS5530/CS5530A.\n- Set board-specific max decode size for Elitegroup K7VTA3.\n- Set board-specific max decode size for Shuttle AK38N.\n\nCorresponding to flashrom svn r806.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Uwe Hermann \u003cuwe@hermann-uwe.de\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "35972aba9e2c7da46b88221b63399d717fe52425",
      "old_mode": 33188,
      "old_path": "board_enable.c",
      "new_id": "7da1682717153fab9b579ce964fed7241d0f15b1",
      "new_mode": 33188,
      "new_path": "board_enable.c"
    },
    {
      "type": "modify",
      "old_id": "333d79d6812cac4f66747df5a3134028e7dbafc8",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "39940232645c21d09b30c768e42f5ceb24f54ee4",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}