flashchips: Fix up GD25Q128C write-protect support
The SPI write-protection functions were missing in the GD25Q128C
entry. Fix that.
Datasheet used:
https://files.pine64.org/doc/datasheet/pine64/GD25Q128C-Rev2.5.pdf
Change-Id: Ibda9f224fb5f57a0878246c324bceb2089dd70ae
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/277
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/flashchips.c b/flashchips.c
index b498b80..68beefc 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7101,6 +7101,9 @@
.sec = {STATUS1, 6, RW}, /* Called BP4 in datasheet, acts like SEC */
.cmp = {STATUS2, 6, RW},
},
+ .wp_write_cfg = spi_wp_write_cfg,
+ .wp_read_cfg = spi_wp_read_cfg,
+ .wp_get_ranges = spi_wp_get_available_ranges,
.decode_range = decode_range_spi25,
.prepare_access = spi_prepare_io,
.finish_access = spi_finish_io,