Add Alder Lake support
Loosely based on commit 11680db4 (ichspi: Add Alder Lake support)
on flashrom master.
Beside a little change in descriptor detection, no difference to
Tiger Lake was found. Hence, add new PCI IDs as 500 series.
Change-Id: Icc1278755ff64f03128d8faadbca85a4ff76864d
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71448
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/chipset_enable.c b/chipset_enable.c
index 7bd12e7..4683da4 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -2129,6 +2129,9 @@
{0x8086, 0x4389, B_S, NT, "Intel", "WM590", enable_flash_pch500},
{0x8086, 0x438a, B_S, NT, "Intel", "QM580", enable_flash_pch500},
{0x8086, 0x438b, B_S, DEP, "Intel", "HM570", enable_flash_pch500},
+ {0x8086, 0x51a4, B_S, DEP, "Intel", "Alder Lake-P", enable_flash_pch500},
+ {0x8086, 0x54a4, B_S, DEP, "Intel", "Alder Lake-N", enable_flash_pch500},
+ {0x8086, 0x7aa4, B_S, NT, "Intel", "Alder Lake-S", enable_flash_pch500},
#endif
{0},
};
diff --git a/ich_descriptors.c b/ich_descriptors.c
index 26be1a2..081481d 100644
--- a/ich_descriptors.c
+++ b/ich_descriptors.c
@@ -110,7 +110,7 @@
"8 series Lynx Point", "Baytrail", "8 series Lynx Point LP", "8 series Wellsburg",
"9 series Wildcat Point", "9 series Wildcat Point LP", "100 series Sunrise Point",
"C620 series Lewisburg", "300/400 series Cannon/Comet Point",
- "500 series Tiger Point", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
+ "500/600 series Tiger/Alder Point", "Apollo Lake", "Gemini Lake", "Elkhart Lake",
};
if (cs < CHIPSET_ICH8 || cs - CHIPSET_ICH8 + 1 >= ARRAY_SIZE(chipset_names))
cs = 0;
@@ -1025,6 +1025,8 @@
return CHIPSET_300_SERIES_CANNON_POINT;
if (content->CSSL == 0x11)
return CHIPSET_500_SERIES_TIGER_POINT;
+ if (content->CSSL == 0x14) /* backwards compatible Alder Point */
+ return CHIPSET_500_SERIES_TIGER_POINT;
if (content->CSSL == 0x03)
return CHIPSET_ELKHART_LAKE;
msg_pwarn("Unknown flash descriptor, assuming 500 series compatibility.\n");
diff --git a/util/ich_descriptors_tool/ich_descriptors_tool.c b/util/ich_descriptors_tool/ich_descriptors_tool.c
index 00c0282..05208c8 100644
--- a/util/ich_descriptors_tool/ich_descriptors_tool.c
+++ b/util/ich_descriptors_tool/ich_descriptors_tool.c
@@ -137,6 +137,7 @@
"\t- \"300\" or \"cannon\" for Intel's 300 series chipsets.\n"
"\t- \"400\" or \"comet\" for Intel's 400 series chipsets.\n"
"\t- \"500\" or \"tiger\" for Intel's 500 series chipsets.\n"
+"\t- \"600\" or \"alder\" for Intel's 600 series chipsets.\n"
"If '-d' is specified some regions such as the BIOS image as seen by the CPU or\n"
"the GbE blob that is required to initialize the GbE are also dumped to files.\n",
argv[0], argv[0]);
@@ -231,7 +232,9 @@
(strcmp(csn, "comet") == 0))
cs = CHIPSET_300_SERIES_CANNON_POINT;
else if ((strcmp(csn, "500") == 0) ||
- (strcmp(csn, "tiger") == 0))
+ (strcmp(csn, "tiger") == 0) ||
+ (strcmp(csn, "600") == 0) ||
+ (strcmp(csn, "alder") == 0))
cs = CHIPSET_500_SERIES_TIGER_POINT;
else if (strcmp(csn, "apollo") == 0)
cs = CHIPSET_APOLLO_LAKE;