diff --git a/chipdrivers.h b/chipdrivers.h
index fd522a6..573dcc2 100644
--- a/chipdrivers.h
+++ b/chipdrivers.h
@@ -63,10 +63,15 @@
 uint8_t spi_read_status_register(struct flashctx *flash);
 int spi_write_status_register(struct flashctx *flash, int status);
 int spi_prettyprint_status_register_plain(struct flashctx *flash);
+int spi_prettyprint_status_register_default_welwip(struct flashctx *flash);
 int spi_prettyprint_status_register_default_bp1(struct flashctx *flash);
 int spi_prettyprint_status_register_default_bp2(struct flashctx *flash);
 int spi_prettyprint_status_register_default_bp3(struct flashctx *flash);
+int spi_prettyprint_status_register_default_bp4(struct flashctx *flash);
 int spi_disable_blockprotect(struct flashctx *flash);
+int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash);
+int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash);
+int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash);
 int spi_prettyprint_status_register_amic_a25l032(struct flashctx *flash);
 int spi_prettyprint_status_register_at25df(struct flashctx *flash);
 int spi_prettyprint_status_register_at25df_sec(struct flashctx *flash);
@@ -82,7 +87,6 @@
 int spi_disable_blockprotect_at25f(struct flashctx *flash);
 int spi_disable_blockprotect_at25f512a(struct flashctx *flash);
 int spi_disable_blockprotect_at25f512b(struct flashctx *flash);
-int spi_disable_blockprotect_at25f4096(struct flashctx *flash);
 int spi_disable_blockprotect_at25fs010(struct flashctx *flash);
 int spi_disable_blockprotect_at25fs040(struct flashctx *flash);
 int spi_prettyprint_status_register_s33(struct flashctx *flash);
diff --git a/flashchips.c b/flashchips.c
index d188617..bbd61ff 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -1849,7 +1849,8 @@
 			}
 		},
 		.printlock	= spi_prettyprint_status_register_at25f4096,
-		.unlock		= spi_disable_blockprotect_at25f4096,
+		/* "Bits 5-6 are 0s when device is not in an internal write cycle." Better leave them alone: */
+		.unlock		= spi_disable_blockprotect_bp2_srwd,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
 		.voltage	= {2700, 3600},
@@ -4473,7 +4474,8 @@
 				.block_erase = spi_block_erase_c7,
 			}
 		},
-		.printlock	= spi_prettyprint_status_register_plain, /* TODO: improve */
+		.printlock	= spi_prettyprint_status_register_default_bp4,
+		.unlock		= spi_disable_blockprotect_bp4_srwd, /* TODO: 2nd status reg (read with 0x35) */
 		.unlock		= spi_disable_blockprotect,
 		.write		= spi_chip_write_256,
 		.read		= spi_chip_read,
diff --git a/spi25_statusreg.c b/spi25_statusreg.c
index a6a4607..e0ed690 100644
--- a/spi25_statusreg.c
+++ b/spi25_statusreg.c
@@ -196,6 +196,27 @@
 	return spi_disable_blockprotect_generic(flash, 0x3C, 0, 0, 0xFF);
 }
 
+/* A common block protection disable that tries to unset the status register bits masked by 0x1C (BP0-2) and
+ * protected/locked by bit #7. Useful when bit #5 is neither a protection bit nor reserved (and hence possibly
+ * non-0). */
+int spi_disable_blockprotect_bp2_srwd(struct flashctx *flash)
+{
+	return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF);
+}
+
+/* A common block protection disable that tries to unset the status register bits masked by 0x3C (BP0-3) and
+ * protected/locked by bit #7. */
+int spi_disable_blockprotect_bp3_srwd(struct flashctx *flash)
+{
+	return spi_disable_blockprotect_generic(flash, 0x3C, 1 << 7, 0, 0xFF);
+}
+
+/* A common block protection disable that tries to unset the status register bits masked by 0x7C (BP0-4) and
+ * protected/locked by bit #7. */
+int spi_disable_blockprotect_bp4_srwd(struct flashctx *flash)
+{
+	return spi_disable_blockprotect_generic(flash, 0x7C, 1 << 7, 0, 0xFF);
+}
 
 static void spi_prettyprint_status_register_hex(uint8_t status)
 {
@@ -261,6 +282,16 @@
 	return 0;
 }
 
+/* Print the plain hex value and the welwip bits only. */
+int spi_prettyprint_status_register_default_welwip(struct flashctx *flash)
+{
+	uint8_t status = spi_read_status_register(flash);
+	spi_prettyprint_status_register_hex(status);
+
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
 /* Works for many chips of the
  * AMIC A25L series
  * and MX MX25L512
@@ -312,6 +343,17 @@
 	return 0;
 }
 
+int spi_prettyprint_status_register_default_bp4(struct flashctx *flash)
+{
+	uint8_t status = spi_read_status_register(flash);
+	spi_prettyprint_status_register_hex(status);
+
+	spi_prettyprint_status_register_srwd(status);
+	spi_prettyprint_status_register_bp(status, 4);
+	spi_prettyprint_status_register_welwip(status);
+	return 0;
+}
+
 /* === Amic ===
  * FIXME: spi_disable_blockprotect is incorrect but works fine for chips using
  * spi_prettyprint_status_register_default_bp1 or
@@ -539,11 +581,6 @@
 	return spi_disable_blockprotect_generic(flash, 0x04, 1 << 7, 1 << 4, 0xFF);
 }
 
-int spi_disable_blockprotect_at25f4096(struct flashctx *flash)
-{
-	return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF);
-}
-
 int spi_disable_blockprotect_at25fs010(struct flashctx *flash)
 {
 	return spi_disable_blockprotect_generic(flash, 0x6C, 1 << 7, 0, 0xFF);
@@ -559,7 +596,7 @@
 /* TODO: Clear P_FAIL and E_FAIL with Clear SR Fail Flags Command (30h) here? */
 int spi_disable_blockprotect_s33(struct flashctx *flash)
 {
-	return spi_disable_blockprotect_generic(flash, 0x1C, 1 << 7, 0, 0xFF);
+	return spi_disable_blockprotect_bp2_srwd(flash);
 }
 
 int spi_prettyprint_status_register_s33(struct flashctx *flash)