tree d505c037e5a2e729e1eb64882c60fd69fcb1b40e
parent 1b365931ea8a9d5766972c17c7cf91b9de595fb1
author Wei Hu <wei@aristanetworks.com> 1525122128 -0700
committer David Hendricks <david.hendricks@gmail.com> 1525640162 +0000

flashchips: Add SST26VF016B(A), SST26VF032B(A), SST26VF064B(A)

This patch seems to have originally been from
https://patchwork.coreboot.org/patch/4126/ . The most recent version
seems to be in OpenEmbedded (commit 503a572) which added support for
16Mbit and 32Mbit variants.

The OpenEmbedded patch also makes changes to linux_spi.c to add some
debug prints which are omitted in this version.

From the original commit message:
Differences between SST26 and SST25:
1. The WREN instruction must be executed prior to WRSR [Section 5.31].
   There is no EWSR.
2. Block protection bits are no longer in the status register. There
   is a dedicated 144-bit register [Table 5-6].  The device is
   write-protected by default. A Global Block-Protection Unlock
   command unlocks the entire memory [Section 4.1].

Change-Id: Ib019bed8ce955049703eb3376c32a83ef607c219
Signed-off-by: Wei Hu <wei@aristanetworks.com>
Signed-off-by: David Hendricks <david.hendricks@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Reviewed-on: https://review.coreboot.org/25962
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>