)]}'
{
  "commit": "1f967c8acf61e2cc0d5e53c50bae11513a16755c",
  "tree": "3a38c1422300513fe68cbeafbd76603290abcd23",
  "parents": [
    "7a6bce62a7b178c141a4dfc5e73b6b9ad80db84e"
  ],
  "author": {
    "name": "Jan Samek",
    "email": "jan.samek@siemens.com",
    "time": "Wed Jan 08 12:35:14 2020 +0100"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Thu Jan 05 16:07:04 2023 +0000"
  },
  "message": "chipset_enable: add PCI ID for APL-I (Broxton)\n\nChange-Id: I48dba541b5893551f47f3d5ed422eb1dc36f5324\nSigned-off-by: Jan Samek \u003cjan.samek@siemens.com\u003e\nSigned-off-by: Henning Schild \u003chenning.schild@siemens.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/42805\nOriginal-Reviewed-by: Paul Menzel \u003cpaulepanter@users.sourceforge.net\u003e\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71315\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\nReviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1feb2600fafd1e79b2c7621dc6dadad4b7d9a4bc",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "d3ae61f720055b46645c6bcb0b20b7efce6e4aa7",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}