)]}'
{
  "commit": "1e637844d58ed05e9b1c3fbffc5811b66bc0a0ad",
  "tree": "9ad4fa71b14e654efae15af1ec00768a1ec37ea9",
  "parents": [
    "530cb2d4f16c110d12852ecbb0d48860eb99bf5e"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Fri May 15 00:56:22 2009 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Fri May 15 00:56:22 2009 +0000"
  },
  "message": "Additionally to WREN also handle WRSR failures gracefully for ICHSPI\n\nUntil the ICH SPI driver can handle preopcodes as standalone opcodes,\nwe should handle such special opcode failure gracefully on ICH and\ncompatible chipsets.\n\nThis fixes status register writes on almost all ICH+VIA SPI masters.\n\nThe fix is almost identical to r484, but this time it affects the EWSR\n(Enable Write Status Register) opcode instead of the WREN (Write Enable)\nopcode.\n\nWith the differentiated return codes introduced in r500, the workaround\nis more precise this time. The old WREN workaround was updated as well.\n\nCorresponding to flashrom svn r514.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: FENG Yu Ning \u003cfengyuning1984@gmail.com\u003e\nAcked-by: Cristi Magherusan \u003ccristi.magherusan@net.utcluj.ro\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "2f2842c9bd9180e4b8be843b0e090647edbb58bd",
      "old_mode": 33188,
      "old_path": "spi.c",
      "new_id": "71cf00477b7316a7dead5f6355a6d6d4e3700602",
      "new_mode": 33188,
      "new_path": "spi.c"
    }
  ]
}