flashchips: Add GigaDevice GD25LB512ME..GD55LB02GE 1.8V parts
The GD25LB512ME shares the ID with GD25LR512ME. All those E versions
look much like the 256Mbit GD25LB256E. Copy this and update the sizes.
Datasheets used:
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00580-GD25LB512ME-Rev1.5.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00621-GD25LR512ME-Rev1.3.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230926/DS-00572-GD55LB01GE-Rev1.4.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230926/DS-00637-GD55LB02GE-Rev1.4.pdf
Change-Id: Ic3ba2a1a7507804f6de611e24606834eb26f19ec
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/305
diff --git a/flashchips.c b/flashchips.c
index 487c708..c639805 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7889,13 +7889,14 @@
{
.vendor = "GigaDevice",
- .name = "GD25LR512ME",
+ .name = "GD25LB512ME/GD25LR512ME",
.bustype = BUS_SPI,
.manufacture_id = GIGADEVICE_ID,
- .model_id = GIGADEVICE_GD25LR512ME,
+ .model_id = GIGADEVICE_GD25LB512ME,
.total_size = 65536,
.page_size = 256,
- .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_4BA,
+ /* Has non-volatile DC bits in unsupported register, controlling QIO, QPI. */
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_OTP | FEATURE_4BA,
.tested = TEST_OK_PREW,
.probe = probe_spi_rdid,
.probe_timing = TIMING_ZERO,
@@ -7909,10 +7910,10 @@
.block_erase = spi_block_erase_20,
}, {
.eraseblocks = { {32 * 1024, 2048} },
- .block_erase = spi_block_erase_52,
+ .block_erase = spi_block_erase_5c,
}, {
.eraseblocks = { {32 * 1024, 2048} },
- .block_erase = spi_block_erase_5c,
+ .block_erase = spi_block_erase_52,
}, {
.eraseblocks = { {64 * 1024, 1024} },
.block_erase = spi_block_erase_dc,
@@ -7927,6 +7928,109 @@
.block_erase = spi_block_erase_c7,
}
},
+ /* Has WPS bit in unsupported register. */
+ .printlock = spi_prettyprint_status_register_bp4_srwd,
+ .unlock = spi_disable_blockprotect_bp4_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1650, 2000},
+ .prepare_access = spi_prepare_io,
+ .finish_access = spi_finish_io,
+ },
+
+ {
+ .vendor = "GigaDevice",
+ .name = "GD55LB01GE",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD55LB01GE,
+ .total_size = 128 * 1024,
+ .page_size = 256,
+ /* Has non-volatile DC bits in unsupported register, controlling QIO, QPI. */
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_OTP | FEATURE_4BA,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 32768} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 32768} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 4096} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 4096} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 2048} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 2048} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {128 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {128 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ /* Has WPS bit in unsupported register. */
+ .printlock = spi_prettyprint_status_register_bp4_srwd,
+ .unlock = spi_disable_blockprotect_bp4_srwd,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1650, 2000},
+ .prepare_access = spi_prepare_io,
+ .finish_access = spi_finish_io,
+ },
+
+ {
+ .vendor = "GigaDevice",
+ .name = "GD55LB02GE",
+ .bustype = BUS_SPI,
+ .manufacture_id = GIGADEVICE_ID,
+ .model_id = GIGADEVICE_GD55LB02GE,
+ .total_size = 256 * 1024,
+ .page_size = 256,
+ /* Has non-volatile DC bits in unsupported register, controlling QIO, QPI. */
+ .feature_bits = FEATURE_WRSR_EITHER | FEATURE_OTP | FEATURE_4BA,
+ .tested = TEST_UNTESTED,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 65536} },
+ .block_erase = spi_block_erase_21,
+ }, {
+ .eraseblocks = { {4 * 1024, 65536} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 8192} },
+ .block_erase = spi_block_erase_5c,
+ }, {
+ .eraseblocks = { {32 * 1024, 8192} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 4096} },
+ .block_erase = spi_block_erase_dc,
+ }, {
+ .eraseblocks = { {64 * 1024, 4096} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {256 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {256 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ /* Has WPS bit in unsupported register. */
.printlock = spi_prettyprint_status_register_bp4_srwd,
.unlock = spi_disable_blockprotect_bp4_srwd,
.write = spi_chip_write_256,
diff --git a/include/flashchips.h b/include/flashchips.h
index 107a30d..819c3ef 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -420,7 +420,9 @@
#define GIGADEVICE_GD25LQ128CD 0x6018
#define GIGADEVICE_GD25LQ256D 0x6019 /* Same as GD25L[EB]256D/GD25LQ255E/GD25L[QE]256H/GD25LB256F/GD25LE255E */
#define GIGADEVICE_GD25LB256E 0x6719 /* Same as GD25LR256E */
-#define GIGADEVICE_GD25LR512ME 0x671a
+#define GIGADEVICE_GD25LB512ME 0x671a /* Same as GD25LR512ME */
+#define GIGADEVICE_GD55LB01GE 0x671b
+#define GIGADEVICE_GD55LB02GE 0x671c
#define GIGADEVICE_GD25WQ80E 0x6514
#define GIGADEVICE_GD29GL064CAB 0x7E0601