)]}'
{
  "commit": "1d3a2fefbc636fb569bd1d018fb97b1b17c08e99",
  "tree": "a384be3a9c9c890870117baf435a0312ecfd4a78",
  "parents": [
    "695fb5d0ac60c399fac4bac8595bfb8a0efdb30f"
  ],
  "author": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Jul 27 22:03:46 2010 +0000"
  },
  "committer": {
    "name": "Carl-Daniel Hailfinger",
    "email": "c-d.hailfinger.devel.2006@gmx.net",
    "time": "Tue Jul 27 22:03:46 2010 +0000"
  },
  "message": "Convert MMIO accesses of non-internal PCI-based programmers to be endian-agnostic\n\nConvert all PCI-based external programmers to use special little-endian\naccessors for all MMIO regions of PCI devices. This patch does _not_\ntouch the internal programmer (which is PCI-based as well).\n\nHuge thanks go to Misha Manulis who worked with me to create a first\nversion of this patch for the satasii programmer based on modification\nof generic code.\n\nHuge thanks also go to Segher Boessenkool for suggesting the pci_mmio_\nprefix for the abstraction layer.\n\nNOTE to package maintainers: With this patch, compilation and usage of\nflashrom should be safe on x86, x86_64, MIPS (little and big endian) and\nPowerPC (big endian).\n\nThe internal programmer is disabled on non-x86/x86_64 (but it\ncompiles). The atahpt, nic3com, nicnatsemi, nicrealtek and rayer_spi\ncan not be compiled on non-x86/x86_64 because port space I/O is\nnot (yet) supported. Please compile with default settings on\nx86/x86_64 and with the following settings on all other architectures:\nmake CONFIG_NIC3COM\u003dno CONFIG_NICREALTEK\u003dno CONFIG_NICNATSEMI\u003dno\nCONFIG_RAYER_SPI\u003dno\n\nCorresponding to flashrom svn r1111.\n\nSigned-off-by: Carl-Daniel Hailfinger \u003cc-d.hailfinger.devel.2006@gmx.net\u003e\nAcked-by: Misha Manulis \u003cmisha@manulis.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "8d64e0c2bd3952cfab5027554e3f82d373972ded",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "6254d2f946e900efff3fd6e53ee6f26866bf4a4f",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    },
    {
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      "old_mode": 33188,
      "old_path": "drkaiser.c",
      "new_id": "0d1f250b7f709fa03de435b6cb2b9f435b8becba",
      "new_mode": 33188,
      "new_path": "drkaiser.c"
    },
    {
      "type": "modify",
      "old_id": "8a16396a37d1702df7d28d10536fc5c9ba4dffb0",
      "old_mode": 33188,
      "old_path": "flash.h",
      "new_id": "aba238082c131e5ae60f5aa28e9c13ada4bb6962",
      "new_mode": 33188,
      "new_path": "flash.h"
    },
    {
      "type": "modify",
      "old_id": "29e2910fa05f27dca2c8951b219edea3aec504fe",
      "old_mode": 33188,
      "old_path": "gfxnvidia.c",
      "new_id": "252ddc5b3253564fe8b7f3f9ca80d84a3f505bfd",
      "new_mode": 33188,
      "new_path": "gfxnvidia.c"
    },
    {
      "type": "modify",
      "old_id": "5c56293ae5a1ec9776c779a2c966eba68418e139",
      "old_mode": 33188,
      "old_path": "satasii.c",
      "new_id": "4e1df8125974864e51e740ec70677bca804a6188",
      "new_mode": 33188,
      "new_path": "satasii.c"
    }
  ]
}