diff --git a/bitbang_spi.c b/bitbang_spi.c
index 0b27a67..5af2370 100644
--- a/bitbang_spi.c
+++ b/bitbang_spi.c
@@ -65,6 +65,7 @@
 
 static const struct spi_master spi_master_bitbang = {
 	.type		= SPI_CONTROLLER_BITBANG,
+	.features	= SPI_MASTER_4BA,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_WRITE_UNLIMITED,
 	.command	= bitbang_spi_send_command,
diff --git a/buspirate_spi.c b/buspirate_spi.c
index b6554ac..6f4c6d0 100644
--- a/buspirate_spi.c
+++ b/buspirate_spi.c
@@ -136,6 +136,7 @@
 
 static struct spi_master spi_master_buspirate = {
 	.type		= SPI_CONTROLLER_BUSPIRATE,
+	.features	= SPI_MASTER_4BA,
 	.max_data_read	= MAX_DATA_UNSPECIFIED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
 	.command	= NULL,
diff --git a/ch341a_spi.c b/ch341a_spi.c
index 6eb2804..2253e43 100644
--- a/ch341a_spi.c
+++ b/ch341a_spi.c
@@ -399,6 +399,7 @@
 
 static const struct spi_master spi_master_ch341a_spi = {
 	.type		= SPI_CONTROLLER_CH341A_SPI,
+	.features	= SPI_MASTER_4BA,
 	/* flashrom's current maximum is 256 B. CH341A was tested on Linux and Windows to accept atleast
 	 * 128 kB. Basically there should be no hard limit because transfers are broken up into USB packets
 	 * sent to the device and most of their payload streamed via SPI. */
diff --git a/dummyflasher.c b/dummyflasher.c
index f171128..1c0c85b 100644
--- a/dummyflasher.c
+++ b/dummyflasher.c
@@ -111,6 +111,7 @@
 
 static const struct spi_master spi_master_dummyflasher = {
 	.type		= SPI_CONTROLLER_DUMMY,
+	.features	= SPI_MASTER_4BA,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_UNSPECIFIED,
 	.command	= dummy_spi_send_command,
diff --git a/ft2232_spi.c b/ft2232_spi.c
index be60837..3889eed 100644
--- a/ft2232_spi.c
+++ b/ft2232_spi.c
@@ -159,6 +159,7 @@
 
 static const struct spi_master spi_master_ft2232 = {
 	.type		= SPI_CONTROLLER_FT2232,
+	.features	= SPI_MASTER_4BA,
 	.max_data_read	= 64 * 1024,
 	.max_data_write	= 256,
 	.command	= ft2232_spi_send_command,
diff --git a/linux_spi.c b/linux_spi.c
index 611559a..1d3605a 100644
--- a/linux_spi.c
+++ b/linux_spi.c
@@ -57,6 +57,7 @@
 
 static const struct spi_master spi_master_linux = {
 	.type		= SPI_CONTROLLER_LINUX,
+	.features	= SPI_MASTER_4BA,
 	.max_data_read	= MAX_DATA_UNSPECIFIED, /* TODO? */
 	.max_data_write	= MAX_DATA_UNSPECIFIED, /* TODO? */
 	.command	= linux_spi_send_command,
diff --git a/programmer.h b/programmer.h
index b390a53..8736449 100644
--- a/programmer.h
+++ b/programmer.h
@@ -24,6 +24,8 @@
 #ifndef __PROGRAMMER_H__
 #define __PROGRAMMER_H__ 1
 
+#include <stdint.h>
+
 #include "flash.h"	/* for chipaddr and flashctx */
 
 enum programmer {
@@ -610,8 +612,12 @@
 #define MAX_DATA_UNSPECIFIED 0
 #define MAX_DATA_READ_UNLIMITED 64 * 1024
 #define MAX_DATA_WRITE_UNLIMITED 256
+
+#define SPI_MASTER_4BA			(1U << 0)  /**< Can handle 4-byte addresses */
+
 struct spi_master {
 	enum spi_controller type;
+	uint32_t features;
 	unsigned int max_data_read; // (Ideally,) maximum data read size in one go (excluding opcode+address).
 	unsigned int max_data_write; // (Ideally,) maximum data write size in one go (excluding opcode+address).
 	int (*command)(struct flashctx *flash, unsigned int writecnt, unsigned int readcnt,
@@ -786,4 +792,11 @@
 void sp_set_pin(enum SP_PIN pin, int val);
 int sp_get_pin(enum SP_PIN pin);
 
+/* spi_master feature checks */
+static inline bool spi_master_4ba(const struct flashctx *const flash)
+{
+	return flash->mst->buses_supported & BUS_SPI &&
+		flash->mst->spi.features & SPI_MASTER_4BA;
+}
+
 #endif				/* !__PROGRAMMER_H__ */
diff --git a/serprog.c b/serprog.c
index 25c9944..62f2820 100644
--- a/serprog.c
+++ b/serprog.c
@@ -305,6 +305,7 @@
 				    unsigned char *readarr);
 static struct spi_master spi_master_serprog = {
 	.type		= SPI_CONTROLLER_SERPROG,
+	.features	= SPI_MASTER_4BA,
 	.max_data_read	= MAX_DATA_READ_UNLIMITED,
 	.max_data_write	= MAX_DATA_WRITE_UNLIMITED,
 	.command	= serprog_spi_send_command,
diff --git a/spi25.c b/spi25.c
index dcc7641..787f62e 100644
--- a/spi25.c
+++ b/spi25.c
@@ -375,6 +375,10 @@
 			       const bool native_4ba, const unsigned int addr)
 {
 	if (native_4ba || flash->in_4ba_mode) {
+		if (!spi_master_4ba(flash)) {
+			msg_cwarn("4-byte address requested but master can't handle 4-byte addresses.\n");
+			return -1;
+		}
 		cmd_buf[1] = (addr >> 24) & 0xff;
 		cmd_buf[2] = (addr >> 16) & 0xff;
 		cmd_buf[3] = (addr >>  8) & 0xff;
@@ -384,9 +388,10 @@
 		if (flash->chip->feature_bits & FEATURE_4BA_EXT_ADDR) {
 			if (spi_set_extended_address(flash, addr >> 24))
 				return -1;
-		} else {
-			if (addr >> 24)
-				return -1;
+		} else if (addr >> 24) {
+			msg_cerr("Can't handle 4-byte address for opcode '0x%02x'\n"
+				 "with this chip/programmer combination.\n", cmd_buf[0]);
+			return -1;
 		}
 		cmd_buf[1] = (addr >> 16) & 0xff;
 		cmd_buf[2] = (addr >>  8) & 0xff;
@@ -628,7 +633,7 @@
 
 static int spi_nbyte_program(struct flashctx *flash, unsigned int addr, const uint8_t *bytes, unsigned int len)
 {
-	const bool native_4ba = !!(flash->chip->feature_bits & FEATURE_4BA_WRITE);
+	const bool native_4ba = flash->chip->feature_bits & FEATURE_4BA_WRITE && spi_master_4ba(flash);
 	const uint8_t op = native_4ba ? JEDEC_BYTE_PROGRAM_4BA : JEDEC_BYTE_PROGRAM;
 	return spi_write_cmd(flash, op, native_4ba, addr, bytes, len, 10);
 }
@@ -636,7 +641,7 @@
 int spi_nbyte_read(struct flashctx *flash, unsigned int address, uint8_t *bytes,
 		   unsigned int len)
 {
-	const bool native_4ba = !!(flash->chip->feature_bits & FEATURE_4BA_READ);
+	const bool native_4ba =	flash->chip->feature_bits & FEATURE_4BA_READ && spi_master_4ba(flash);
 	uint8_t cmd[1 + JEDEC_MAX_ADDR_LEN] = { native_4ba ? JEDEC_READ_4BA : JEDEC_READ, };
 
 	const int addr_len = spi_prepare_address(flash, cmd, native_4ba, address);