)]}'
{
  "commit": "1c7297fdbb34c6d211a31b4071c232d7e053289a",
  "tree": "141678ce4577d4743df0808f550b43329c7fd884",
  "parents": [
    "4db0fdfdcb59f94e41c0967375c899e2d274e113"
  ],
  "author": {
    "name": "Angel Pons",
    "email": "th3fanbus@gmail.com",
    "time": "Mon May 17 10:50:40 2021 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Thu Jan 05 16:15:22 2023 +0000"
  },
  "message": "chipset_enable.c: Add Gemini Lake eSPI PCI device ID\n\nTaken from coreboot `PCI_DEVICE_ID_INTEL_GLK_ESPI` macro, untested.\n\nChange-Id: Ie34527e56edcba4982f17b8e0aef0fc4280a52bc\nSigned-off-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54354\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Sam McNally \u003csammc@google.com\u003e\nReviewed-on: https://review.coreboot.org/c/flashrom-stable/+/71355\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nTested-by: build bot (Jenkins) \u003cno-reply@coreboot.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "1d7526e2b34ea79dde2dfd04b4c49f1a84c66d23",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "62cc858718945bdddd0d5e81b2f2d8566fc27c68",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}