flashchips: Add W25Q128JW_DTR
Port the code from chromeos flashrom
BUG=b:144297264
TEST=Tested using W25Q128JWDTR in SPI mode
Signed-off-by: Peichao.Wang <peichao.wang@bitland.corp-partner.google.com>
Change-Id: Ifc28878b17dc10da2cfd8f82fffbd57adb22799e
Reviewed-on: https://review.coreboot.org/c/flashrom/+/36717
Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/flashchips.c b/flashchips.c
index 517289a..4324c11 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -16414,6 +16414,44 @@
{
.vendor = "Winbond",
+ .name = "W25Q128.JW.DTR",
+ .bustype = BUS_SPI,
+ .manufacture_id = WINBOND_NEX_ID,
+ .model_id = WINBOND_NEX_W25Q128_DTR,
+ .total_size = 16384,
+ .page_size = 256,
+ .feature_bits = FEATURE_WRSR_WREN | FEATURE_OTP | FEATURE_QPI,
+ .tested = TEST_OK_PREW,
+ .probe = probe_spi_rdid,
+ .probe_timing = TIMING_ZERO,
+ .block_erasers =
+ {
+ {
+ .eraseblocks = { {4 * 1024, 4096} },
+ .block_erase = spi_block_erase_20,
+ }, {
+ .eraseblocks = { {32 * 1024, 512} },
+ .block_erase = spi_block_erase_52,
+ }, {
+ .eraseblocks = { {64 * 1024, 256} },
+ .block_erase = spi_block_erase_d8,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_60,
+ }, {
+ .eraseblocks = { {16 * 1024 * 1024, 1} },
+ .block_erase = spi_block_erase_c7,
+ }
+ },
+ .printlock = spi_prettyprint_status_register_plain, /* TODO: improve */
+ .unlock = spi_disable_blockprotect,
+ .write = spi_chip_write_256,
+ .read = spi_chip_read,
+ .voltage = {1650, 1950},
+ },
+
+ {
+ .vendor = "Winbond",
.name = "W25Q16.V",
.bustype = BUS_SPI,
.manufacture_id = WINBOND_NEX_ID,