diff --git a/bitbang_spi.c b/bitbang_spi.c
index ef9e77c..8a5b5b6 100644
--- a/bitbang_spi.c
+++ b/bitbang_spi.c
@@ -29,44 +29,44 @@
 /* Note that CS# is active low, so val=0 means the chip is active. */
 static void bitbang_spi_set_cs(const struct bitbang_spi_master * const master, int val)
 {
-	master->set_cs(val);
+	master->set_cs(val, NULL);
 }
 
 static void bitbang_spi_set_sck(const struct bitbang_spi_master * const master, int val)
 {
-	master->set_sck(val);
+	master->set_sck(val, NULL);
 }
 
 static void bitbang_spi_request_bus(const struct bitbang_spi_master * const master)
 {
 	if (master->request_bus)
-		master->request_bus();
+		master->request_bus(NULL);
 }
 
 static void bitbang_spi_release_bus(const struct bitbang_spi_master * const master)
 {
 	if (master->release_bus)
-		master->release_bus();
+		master->release_bus(NULL);
 }
 
 static void bitbang_spi_set_sck_set_mosi(const struct bitbang_spi_master * const master, int sck, int mosi)
 {
 	if (master->set_sck_set_mosi) {
-		master->set_sck_set_mosi(sck, mosi);
+		master->set_sck_set_mosi(sck, mosi, NULL);
 		return;
 	}
 
-	master->set_sck(sck);
-	master->set_mosi(mosi);
+	master->set_sck(sck, NULL);
+	master->set_mosi(mosi, NULL);
 }
 
 static int bitbang_spi_set_sck_get_miso(const struct bitbang_spi_master * const master, int sck)
 {
 	if (master->set_sck_get_miso)
-		return master->set_sck_get_miso(sck);
+		return master->set_sck_get_miso(sck, NULL);
 
-	master->set_sck(sck);
-	return master->get_miso();
+	master->set_sck(sck, NULL);
+	return master->get_miso(NULL);
 }
 
 static int bitbang_spi_send_command(const struct flashctx *flash,
diff --git a/developerbox_spi.c b/developerbox_spi.c
index c327043..ae0961e 100644
--- a/developerbox_spi.c
+++ b/developerbox_spi.c
@@ -92,27 +92,27 @@
 		msg_perr("Failed to read GPIO pins (%s)\n", libusb_error_name(res));
 }
 
-static void cp210x_bitbang_set_cs(int val)
+static void cp210x_bitbang_set_cs(int val, void *spi_data)
 {
 	cp210x_gpio_set(val << DEVELOPERBOX_SPI_CS, 1 << DEVELOPERBOX_SPI_CS);
 }
 
-static void cp210x_bitbang_set_sck(int val)
+static void cp210x_bitbang_set_sck(int val, void *spi_data)
 {
 	cp210x_gpio_set(val << DEVELOPERBOX_SPI_SCK, 1 << DEVELOPERBOX_SPI_SCK);
 }
 
-static void cp210x_bitbang_set_mosi(int val)
+static void cp210x_bitbang_set_mosi(int val, void *spi_data)
 {
 	cp210x_gpio_set(val << DEVELOPERBOX_SPI_MOSI, 1 << DEVELOPERBOX_SPI_MOSI);
 }
 
-static int cp210x_bitbang_get_miso(void)
+static int cp210x_bitbang_get_miso(void *spi_data)
 {
 	return !!(cp210x_gpio_get() & (1 << DEVELOPERBOX_SPI_MISO));
 }
 
-static void cp210x_bitbang_set_sck_set_mosi(int sck, int mosi)
+static void cp210x_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data)
 {
 	cp210x_gpio_set(sck << DEVELOPERBOX_SPI_SCK | mosi << DEVELOPERBOX_SPI_MOSI,
 			  1 << DEVELOPERBOX_SPI_SCK |    1 << DEVELOPERBOX_SPI_MOSI);
diff --git a/include/programmer.h b/include/programmer.h
index 527eeb3..b0eac19 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -102,15 +102,15 @@
 
 struct bitbang_spi_master {
 	/* Note that CS# is active low, so val=0 means the chip is active. */
-	void (*set_cs) (int val);
-	void (*set_sck) (int val);
-	void (*set_mosi) (int val);
-	int (*get_miso) (void);
-	void (*request_bus) (void);
-	void (*release_bus) (void);
+	void (*set_cs) (int val, void *spi_data);
+	void (*set_sck) (int val, void *spi_data);
+	void (*set_mosi) (int val, void *spi_data);
+	int (*get_miso) (void *spi_data);
+	void (*request_bus) (void *spi_data);
+	void (*release_bus) (void *spi_data);
 	/* optional functions to optimize xfers */
-	void (*set_sck_set_mosi) (int sck, int mosi);
-	int (*set_sck_get_miso) (int sck);
+	void (*set_sck_set_mosi) (int sck, int mosi, void *spi_data);
+	int (*set_sck_get_miso) (int sck, void *spi_data);
 	/* Length of half a clock period in usecs. */
 	unsigned int half_period;
 };
diff --git a/mcp6x_spi.c b/mcp6x_spi.c
index bf09628..2e5d1de 100644
--- a/mcp6x_spi.c
+++ b/mcp6x_spi.c
@@ -40,7 +40,7 @@
 /* Cached value of last GPIO state. */
 static uint8_t mcp_gpiostate;
 
-static void mcp6x_request_spibus(void)
+static void mcp6x_request_spibus(void *spi_data)
 {
 	mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
 	mcp_gpiostate |= 1 << MCP6X_SPI_REQUEST;
@@ -53,34 +53,34 @@
 	mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
 }
 
-static void mcp6x_release_spibus(void)
+static void mcp6x_release_spibus(void *spi_data)
 {
 	mcp_gpiostate &= ~(1 << MCP6X_SPI_REQUEST);
 	mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
 }
 
-static void mcp6x_bitbang_set_cs(int val)
+static void mcp6x_bitbang_set_cs(int val, void *spi_data)
 {
 	mcp_gpiostate &= ~(1 << MCP6X_SPI_CS);
 	mcp_gpiostate |= (val << MCP6X_SPI_CS);
 	mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
 }
 
-static void mcp6x_bitbang_set_sck(int val)
+static void mcp6x_bitbang_set_sck(int val, void *spi_data)
 {
 	mcp_gpiostate &= ~(1 << MCP6X_SPI_SCK);
 	mcp_gpiostate |= (val << MCP6X_SPI_SCK);
 	mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
 }
 
-static void mcp6x_bitbang_set_mosi(int val)
+static void mcp6x_bitbang_set_mosi(int val, void *spi_data)
 {
 	mcp_gpiostate &= ~(1 << MCP6X_SPI_MOSI);
 	mcp_gpiostate |= (val << MCP6X_SPI_MOSI);
 	mmio_writeb(mcp_gpiostate, mcp6x_spibar + 0x530);
 }
 
-static int mcp6x_bitbang_get_miso(void)
+static int mcp6x_bitbang_get_miso(void *spi_data)
 {
 	mcp_gpiostate = mmio_readb(mcp6x_spibar + 0x530);
 	return (mcp_gpiostate >> MCP6X_SPI_MISO) & 0x1;
diff --git a/nicintel_spi.c b/nicintel_spi.c
index 91ae02f..ed94d93 100644
--- a/nicintel_spi.c
+++ b/nicintel_spi.c
@@ -106,7 +106,7 @@
 	{0},
 };
 
-static void nicintel_request_spibus(void)
+static void nicintel_request_spibus(void *spi_data)
 {
 	uint32_t tmp;
 
@@ -118,7 +118,7 @@
 	while (!(pci_mmio_readl(nicintel_spibar + FLA) & BIT(FL_GNT))) ;
 }
 
-static void nicintel_release_spibus(void)
+static void nicintel_release_spibus(void *spi_data)
 {
 	uint32_t tmp;
 
@@ -127,7 +127,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_cs(int val)
+static void nicintel_bitbang_set_cs(int val, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -137,7 +137,7 @@
 	pci_mmio_writel(tmp,  nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_sck(int val)
+static void nicintel_bitbang_set_sck(int val, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -147,7 +147,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_mosi(int val)
+static void nicintel_bitbang_set_mosi(int val, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -157,7 +157,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi)
+static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -169,7 +169,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static int nicintel_bitbang_get_miso(void)
+static int nicintel_bitbang_get_miso(void *spi_data)
 {
 	uint32_t tmp;
 
@@ -178,7 +178,7 @@
 	return tmp;
 }
 
-static int nicintel_bitbang_set_sck_get_miso(int sck)
+static int nicintel_bitbang_set_sck_get_miso(int sck, void *spi_data)
 {
 	uint32_t tmp;
 
diff --git a/ogp_spi.c b/ogp_spi.c
index ea1f6b2..aa4f422 100644
--- a/ogp_spi.c
+++ b/ogp_spi.c
@@ -50,32 +50,32 @@
 	{0},
 };
 
-static void ogp_request_spibus(void)
+static void ogp_request_spibus(void *spi_data)
 {
 	pci_mmio_writel(1, ogp_spibar + ogp_reg_sel);
 }
 
-static void ogp_release_spibus(void)
+static void ogp_release_spibus(void *spi_data)
 {
 	pci_mmio_writel(0, ogp_spibar + ogp_reg_sel);
 }
 
-static void ogp_bitbang_set_cs(int val)
+static void ogp_bitbang_set_cs(int val, void *spi_data)
 {
 	pci_mmio_writel(val, ogp_spibar + ogp_reg__ce);
 }
 
-static void ogp_bitbang_set_sck(int val)
+static void ogp_bitbang_set_sck(int val, void *spi_data)
 {
 	pci_mmio_writel(val, ogp_spibar + ogp_reg_sck);
 }
 
-static void ogp_bitbang_set_mosi(int val)
+static void ogp_bitbang_set_mosi(int val, void *spi_data)
 {
 	pci_mmio_writel(val, ogp_spibar + ogp_reg_siso);
 }
 
-static int ogp_bitbang_get_miso(void)
+static int ogp_bitbang_get_miso(void *spi_data)
 {
 	uint32_t tmp;
 
diff --git a/pony_spi.c b/pony_spi.c
index 22f5f02..9096201 100644
--- a/pony_spi.c
+++ b/pony_spi.c
@@ -56,7 +56,7 @@
 /* Pins for slave->master direction */
 static int pony_negate_miso = 0;
 
-static void pony_bitbang_set_cs(int val)
+static void pony_bitbang_set_cs(int val, void *spi_data)
 {
 	if (pony_negate_cs)
 		val ^=  1;
@@ -64,7 +64,7 @@
 	sp_set_pin(PIN_TXD, val);
 }
 
-static void pony_bitbang_set_sck(int val)
+static void pony_bitbang_set_sck(int val, void *spi_data)
 {
 	if (pony_negate_sck)
 		val ^=  1;
@@ -72,7 +72,7 @@
 	sp_set_pin(PIN_RTS, val);
 }
 
-static void pony_bitbang_set_mosi(int val)
+static void pony_bitbang_set_mosi(int val, void *spi_data)
 {
 	if (pony_negate_mosi)
 		val ^=  1;
@@ -80,7 +80,7 @@
 	sp_set_pin(PIN_DTR, val);
 }
 
-static int pony_bitbang_get_miso(void)
+static int pony_bitbang_get_miso(void *spi_data)
 {
 	int tmp = sp_get_pin(PIN_CTS);
 
@@ -192,9 +192,9 @@
 	/*
 	 * Detect if there is a compatible hardware programmer connected.
 	 */
-	pony_bitbang_set_cs(1);
-	pony_bitbang_set_sck(1);
-	pony_bitbang_set_mosi(1);
+	pony_bitbang_set_cs(1, NULL);
+	pony_bitbang_set_sck(1, NULL);
+	pony_bitbang_set_mosi(1, NULL);
 
 	switch (type) {
 	case TYPE_AJAWE:
diff --git a/rayer_spi.c b/rayer_spi.c
index 5267a06..009e02f 100644
--- a/rayer_spi.c
+++ b/rayer_spi.c
@@ -125,28 +125,28 @@
 /* Cached value of last byte sent. */
 static uint8_t lpt_outbyte;
 
-static void rayer_bitbang_set_cs(int val)
+static void rayer_bitbang_set_cs(int val, void *spi_data)
 {
 	lpt_outbyte &= ~(1 << pinout->cs_bit);
 	lpt_outbyte |= (val << pinout->cs_bit);
 	OUTB(lpt_outbyte, lpt_iobase);
 }
 
-static void rayer_bitbang_set_sck(int val)
+static void rayer_bitbang_set_sck(int val, void *spi_data)
 {
 	lpt_outbyte &= ~(1 << pinout->sck_bit);
 	lpt_outbyte |= (val << pinout->sck_bit);
 	OUTB(lpt_outbyte, lpt_iobase);
 }
 
-static void rayer_bitbang_set_mosi(int val)
+static void rayer_bitbang_set_mosi(int val, void *spi_data)
 {
 	lpt_outbyte &= ~(1 << pinout->mosi_bit);
 	lpt_outbyte |= (val << pinout->mosi_bit);
 	OUTB(lpt_outbyte, lpt_iobase);
 }
 
-static int rayer_bitbang_get_miso(void)
+static int rayer_bitbang_get_miso(void *spi_data)
 {
 	uint8_t tmp;