commit 0e78818c2c818aa860a976524cfdf552792cfeba
author Anastasia Klimchuk <aklm@chromium.org> Wed May 26 09:54:08 2021 +1000
committer Nico Huber <nico.h@gmx.de> Sat Mar 04 12:33:03 2023 +0000
tree 0bd2c0ba9086639ba4c49259bfef7777ce95a82a
parent a447c12ecf71954f40a2b07817b3933b7bd3e495

bitbang: Extend bitbang_spi_master functions to accept spi data

This way every bitbang spi master has access to its own spi data,
and can use this data in all its functions.

This patch only changes the signatures of functions.

flashrom-stable: Adapted new function signatures in `nicintel_spi`.

Change-Id: Id5722a43ce20feeed62630ad80e14df7744f9c02
Signed-off-by: Anastasia Klimchuk <aklm@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/c/flashrom/+/54991
Original-Reviewed-by: Edward O'Callaghan <quasisec@chromium.org>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/73268
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

nicintel_spi.c

diff --git a/nicintel_spi.c b/nicintel_spi.c
index 91ae02f..ed94d93 100644
--- a/nicintel_spi.c
+++ b/nicintel_spi.c
@@ -106,7 +106,7 @@
 	{0},
 };
 
-static void nicintel_request_spibus(void)
+static void nicintel_request_spibus(void *spi_data)
 {
 	uint32_t tmp;
 
@@ -118,7 +118,7 @@
 	while (!(pci_mmio_readl(nicintel_spibar + FLA) & BIT(FL_GNT))) ;
 }
 
-static void nicintel_release_spibus(void)
+static void nicintel_release_spibus(void *spi_data)
 {
 	uint32_t tmp;
 
@@ -127,7 +127,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_cs(int val)
+static void nicintel_bitbang_set_cs(int val, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -137,7 +137,7 @@
 	pci_mmio_writel(tmp,  nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_sck(int val)
+static void nicintel_bitbang_set_sck(int val, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -147,7 +147,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_mosi(int val)
+static void nicintel_bitbang_set_mosi(int val, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -157,7 +157,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi)
+static void nicintel_bitbang_set_sck_set_mosi(int sck, int mosi, void *spi_data)
 {
 	uint32_t tmp;
 
@@ -169,7 +169,7 @@
 	pci_mmio_writel(tmp, nicintel_spibar + FLA);
 }
 
-static int nicintel_bitbang_get_miso(void)
+static int nicintel_bitbang_get_miso(void *spi_data)
 {
 	uint32_t tmp;
 
@@ -178,7 +178,7 @@
 	return tmp;
 }
 
-static int nicintel_bitbang_set_sck_get_miso(int sck)
+static int nicintel_bitbang_set_sck_get_miso(int sck, void *spi_data)
 {
 	uint32_t tmp;