Following patch fixes VIA SPI (VT8237S)

It needs to have opcodes initialized same way as ICH7.

Corresponding to flashrom svn r413 and coreboot v2 svn r3926.

Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Peter Stuge <peter@stuge.se>
diff --git a/chipset_enable.c b/chipset_enable.c
index dc5cccb..3eb8b28 100644
--- a/chipset_enable.c
+++ b/chipset_enable.c
@@ -221,6 +221,7 @@
 		     *(uint16_t *) (spibar + 0x6c));
 
 	flashbus = BUS_TYPE_VIA_SPI;
+	ich_init_opcodes();
 
 	return 0;
 }