)]}'
{
  "commit": "092a699d02a5003b323ed6df5a9e1b1241c4d620",
  "tree": "b71c0d02ae41304cd22da77dd6c80da084a7cea7",
  "parents": [
    "5bbd3241aa74908d916e42ce37ed94f1f0bce4f3"
  ],
  "author": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Aug 25 12:45:18 2024 +0200"
  },
  "committer": {
    "name": "Nico Huber",
    "email": "nico.h@gmx.de",
    "time": "Sun Nov 10 13:58:05 2024 +0000"
  },
  "message": "chipset_enable: Remove hidden-spidev workaround for TGP+\n\nWhen the 500 series PCH (Tiger Point) support was added, we did\nnot know if all firmware will be consistent in the decision not\nto hide the SPI PCI devices.  A few years later, we can confirm\nthat it is: Grepping[1] through the `linuxhw\u0027 database[2] shows\nthat we actually gain some hardware support,  when matching the\nSPI PCI device directly.\n\nFor Alder Lake and Raptor Lake, we already used the PCI IDs of\nthe SPI device.\n\nTested read on Alder Lake P, read/erase/write on RM590E (Tiger\nPoint) which was previously not detected.\n\n[1] diff -u \u003c(git grep -lE \u00271f.5.*8086:(a0a4|43a4)\u0027 | grep -v README) \\\n            \u003c(git grep -lE \u00271f.0.*8086:(a08[123678]|438[1-df])\u0027 | grep -v README)\n[2] https://github.com/linuxhw/LsPCI/\n\nChange-Id: I2474d94be53fe01f8bd01d924098fa28fd43d657\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/251\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "e0c29d581ae7aeda88b379ebc05a014140136a18",
      "old_mode": 33188,
      "old_path": "chipset_enable.c",
      "new_id": "f2c9d165f61b1b855a21b049a19fac9cba8c0482",
      "new_mode": 33188,
      "new_path": "chipset_enable.c"
    }
  ]
}