flashchips: Add GigaDevice GD25LB256E 1.8V part

This chip has WPS and DC bits in unsupported configuration registers.
Hence we can't support QPI and block protection for now.

Datasheet used:
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20230627/DS-00513-GD25LB256E-Rev2.0.pdf
https://www.gigadevice.com.cn/Public/Uploads/uploadfile/files/20241211/DS-00573-GD25LR256E-Rev1.6.pdf

Change-Id: I0dab32efab33d34a4c29ca84a5e1e1fe0b408e07
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.sourcearcade.org/c/flashprog/+/304
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
diff --git a/flashchips.c b/flashchips.c
index c8b9b1c..8bbee16 100644
--- a/flashchips.c
+++ b/flashchips.c
@@ -7614,6 +7614,57 @@
 
 	{
 		.vendor		= "GigaDevice",
+		.name		= "GD25LB256E/GD25LR256E",
+		.bustype	= BUS_SPI,
+		.manufacture_id	= GIGADEVICE_ID,
+		.model_id	= GIGADEVICE_GD25LB256E,
+		.total_size	= 32768,
+		.page_size	= 256,
+		/* Has non-volatile DC bits in unsupported register, controlling QIO, QPI. */
+		.feature_bits	= FEATURE_WRSR_EITHER | FEATURE_OTP | FEATURE_4BA,
+		.tested		= TEST_UNTESTED,
+		.probe		= probe_spi_rdid,
+		.probe_timing	= TIMING_ZERO,
+		.block_erasers	=
+		{
+			{
+				.eraseblocks = { {4 * 1024, 8192} },
+				.block_erase = spi_block_erase_21,
+			}, {
+				.eraseblocks = { {4 * 1024, 8192} },
+				.block_erase = spi_block_erase_20,
+			}, {
+				.eraseblocks = { {32 * 1024, 1024} },
+				.block_erase = spi_block_erase_5c,
+			}, {
+				.eraseblocks = { {32 * 1024, 1024} },
+				.block_erase = spi_block_erase_52,
+			}, {
+				.eraseblocks = { {64 * 1024, 512} },
+				.block_erase = spi_block_erase_dc,
+			}, {
+				.eraseblocks = { {64 * 1024, 512} },
+				.block_erase = spi_block_erase_d8,
+			}, {
+				.eraseblocks = { {32 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_60,
+			}, {
+				.eraseblocks = { {32 * 1024 * 1024, 1} },
+				.block_erase = spi_block_erase_c7,
+			}
+		},
+		/* Has WPS bit in unsupported register. */
+		.printlock	= spi_prettyprint_status_register_bp4_srwd,
+		.unlock		= spi_disable_blockprotect_bp4_srwd,
+		.write		= spi_chip_write_256,
+		.read		= spi_chip_read,
+		.voltage	= {1650, 2000},
+		.prepare_access	= spi_prepare_io,
+		.finish_access	= spi_finish_io,
+	},
+
+	{
+		.vendor		= "GigaDevice",
 		.name		= "GD25LQ32",
 		.bustype	= BUS_SPI,
 		.manufacture_id	= GIGADEVICE_ID,
diff --git a/include/flashchips.h b/include/flashchips.h
index 7871077..84296bf 100644
--- a/include/flashchips.h
+++ b/include/flashchips.h
@@ -416,6 +416,7 @@
 #define GIGADEVICE_GD25LQ64	0x6017	/* Same as GD25LQ64B (which is faster) */
 #define GIGADEVICE_GD25LQ128CD	0x6018
 #define GIGADEVICE_GD25LQ256D	0x6019	/* Same as GD25L[EB]256D/GD25LQ255E/GD25L[QE]256H/GD25LB256F/GD25LE255E */
+#define GIGADEVICE_GD25LB256E	0x6719	/* Same as GD25LR256E */
 #define GIGADEVICE_GD25LR512ME	0x671a
 #define GIGADEVICE_GD25WQ80E	0x6514
 #define GIGADEVICE_GD29GL064CAB	0x7E0601