sbxxx: spibar[0] debug print refinements
Newer models support a 66 MHz clock and fast reads.
We should probably distinguish the models better (as we do in ichspi)
and add support for frequency selection etc. For now this has to
suffice.
Corresponding to flashrom svn r1678.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
diff --git a/flash.h b/flash.h
index 6ff691a..1857cc0 100644
--- a/flash.h
+++ b/flash.h
@@ -24,6 +24,7 @@
#ifndef __FLASH_H__
#define __FLASH_H__ 1
+#include <inttypes.h>
#include <stdint.h>
#include <stddef.h>
#ifdef _WIN32
diff --git a/sb600spi.c b/sb600spi.c
index fe60aa9..a5c00d8 100644
--- a/sb600spi.c
+++ b/sb600spi.c
@@ -211,7 +211,7 @@
uint32_t tmp;
uint8_t reg;
static const char *const speed_names[4] = {
- "Reserved", "33", "22", "16.5"
+ "66/reserved", "33", "22", "16.5"
};
/* Read SPI_BaseAddr */
@@ -250,9 +250,10 @@
* SB700 or later, reads and writes will be corrupted. Abort in this
* case. Make sure to avoid this check on SB600.
*/
- msg_pdbg("SpiArbEnable=%i, SpiAccessMacRomEn=%i, "
+ msg_pdbg("(0x%08" PRIx32 ") fastReadEnable=%u, SpiArbEnable=%i, SpiAccessMacRomEn=%i, "
"SpiHostAccessRomEn=%i, ArbWaitCount=%i, "
"SpiBridgeDisable=%i, DropOneClkOnRd=%i\n",
+ tmp, (tmp >> 18) & 0x1,
(tmp >> 19) & 0x1, (tmp >> 22) & 0x1,
(tmp >> 23) & 0x1, (tmp >> 24) & 0x7,
(tmp >> 27) & 0x1, (tmp >> 28) & 0x1);