chipset_enable: Optionally check PCI revision field
We used to match compatible chipset devices by vendor and device ID
only. On some chipsets, e.g. AMD southbridges / SoCs, this is not
enough, though, as the device IDs are rarely updated.
In the case of AMD chipsets, we can identify the chipset with the
revision ID of the SMBus device. So we add that field to the chipset
enable list.
Change-Id: I4021cf8e83c605fde4360c274b39481b1e0ff070
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/c/flashrom-stable/+/72573
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
diff --git a/include/programmer.h b/include/programmer.h
index 2a4a8f4..bbdbffb 100644
--- a/include/programmer.h
+++ b/include/programmer.h
@@ -22,6 +22,7 @@
#include <stdbool.h>
#include <stdint.h>
+#include <stdbool.h>
#include "flash.h" /* for chipaddr and flashctx */
@@ -142,6 +143,8 @@
struct penable {
uint16_t vendor_id;
uint16_t device_id;
+ bool match_revision;
+ uint8_t revision_id;
enum chipbustype buses;
const enum test_state status;
const char *vendor_name;