)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"340690623a036fa345b5d94f1d469b00b677feb4","unresolved":false,"context_lines":[{"line_number":10,"context_line":"power *wells* (or power groups, PG) were numbered and had to be"},{"line_number":11,"context_line":"enabled in linear order, now we have a tree:"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"       PG0"},{"line_number":14,"context_line":"        |"},{"line_number":15,"context_line":"     --PG1--"},{"line_number":16,"context_line":"    /       \\"},{"line_number":17,"context_line":"  PGA     --PG2--"},{"line_number":18,"context_line":"         /   |   \\"},{"line_number":19,"context_line":"       PGB  PGC  PGD"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"Where PGA .. PGD are required for the display pipelines A .. D."},{"line_number":22,"context_line":"Also, there are power domains for five combo DDIs now, but only"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"f271765d_27327b67","line":19,"range":{"start_line":13,"start_character":0,"end_line":19,"end_character":20},"updated":"2026-06-14 16:22:29.000000000","message":"How I\u0027d draw it:\n```suggestion\n       PG0\n        |\n       PG1\n        |\n   +----+----+\n   |         |\n  PGA       PG2\n             |\n        +----+----+\n        |    |    |\n       PGB  PGC  PGD\n```\nBut I\u0027m fine with the existing diagram.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"05f816b50440ff3d8136dec0b12505f2ead295bc","unresolved":false,"context_lines":[{"line_number":10,"context_line":"power *wells* (or power groups, PG) were numbered and had to be"},{"line_number":11,"context_line":"enabled in linear order, now we have a tree:"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"       PG0"},{"line_number":14,"context_line":"        |"},{"line_number":15,"context_line":"     --PG1--"},{"line_number":16,"context_line":"    /       \\"},{"line_number":17,"context_line":"  PGA     --PG2--"},{"line_number":18,"context_line":"         /   |   \\"},{"line_number":19,"context_line":"       PGB  PGC  PGD"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"Where PGA .. PGD are required for the display pipelines A .. D."},{"line_number":22,"context_line":"Also, there are power domains for five combo DDIs now, but only"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"ae5549bf_7978c244","line":19,"range":{"start_line":13,"start_character":0,"end_line":19,"end_character":20},"in_reply_to":"5c83caa3_b7bf48a5","updated":"2026-06-25 15:37:39.000000000","message":"No worries, I drew this from a \"circuit\" point of view where PGx would be switches and the \"buses\" would be the power planes themselves.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"70bd161f11fd04b6c6096cd24d5638597ec70555","unresolved":false,"context_lines":[{"line_number":10,"context_line":"power *wells* (or power groups, PG) were numbered and had to be"},{"line_number":11,"context_line":"enabled in linear order, now we have a tree:"},{"line_number":12,"context_line":""},{"line_number":13,"context_line":"       PG0"},{"line_number":14,"context_line":"        |"},{"line_number":15,"context_line":"     --PG1--"},{"line_number":16,"context_line":"    /       \\"},{"line_number":17,"context_line":"  PGA     --PG2--"},{"line_number":18,"context_line":"         /   |   \\"},{"line_number":19,"context_line":"       PGB  PGC  PGD"},{"line_number":20,"context_line":""},{"line_number":21,"context_line":"Where PGA .. PGD are required for the display pipelines A .. D."},{"line_number":22,"context_line":"Also, there are power domains for five combo DDIs now, but only"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":4,"id":"5c83caa3_b7bf48a5","line":19,"range":{"start_line":13,"start_character":0,"end_line":19,"end_character":20},"in_reply_to":"f271765d_27327b67","updated":"2026-06-15 21:13:15.000000000","message":"Sorry, but um, that would look like a bus below PG1 and PG2. Let\u0027s\nstick to the original.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"}],"common/tigerlake/xelpd/hw-gfx-gma-power_domains.adb":[{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"340690623a036fa345b5d94f1d469b00b677feb4","unresolved":false,"context_lines":[{"line_number":72,"context_line":"               DP_Alt   \u003d\u003e Port in Physical_USBC_Ports,"},{"line_number":73,"context_line":"               Success  \u003d\u003e Success);"},{"line_number":74,"context_line":"            if not Success then"},{"line_number":75,"context_line":"               return;"},{"line_number":76,"context_line":"            end if;"},{"line_number":77,"context_line":"         end if;"},{"line_number":78,"context_line":"         PD_On (Aux);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"4a0234f7_aa643e31","line":75,"updated":"2026-06-14 16:22:29.000000000","message":"I imagine powering off unused power wells is not wise to do in an error path.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"70bd161f11fd04b6c6096cd24d5638597ec70555","unresolved":false,"context_lines":[{"line_number":72,"context_line":"               DP_Alt   \u003d\u003e Port in Physical_USBC_Ports,"},{"line_number":73,"context_line":"               Success  \u003d\u003e Success);"},{"line_number":74,"context_line":"            if not Success then"},{"line_number":75,"context_line":"               return;"},{"line_number":76,"context_line":"            end if;"},{"line_number":77,"context_line":"         end if;"},{"line_number":78,"context_line":"         PD_On (Aux);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"8aefe243_ef64cc9b","line":75,"in_reply_to":"4a0234f7_aa643e31","updated":"2026-06-15 21:13:15.000000000","message":"It\u0027s a bit of peculiarity of the higher levels actually. We simply don\u0027t\nknow what is used at this point. Even if it looks like we just enabled\nsomething, it might have been enabled already. So a `Power_Up ()` does\njust that, power things up. The caller (usually `Update_Outputs ()` or\n`Scan_Ports ()`) is supposed to clean up eventually.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"05f816b50440ff3d8136dec0b12505f2ead295bc","unresolved":false,"context_lines":[{"line_number":72,"context_line":"               DP_Alt   \u003d\u003e Port in Physical_USBC_Ports,"},{"line_number":73,"context_line":"               Success  \u003d\u003e Success);"},{"line_number":74,"context_line":"            if not Success then"},{"line_number":75,"context_line":"               return;"},{"line_number":76,"context_line":"            end if;"},{"line_number":77,"context_line":"         end if;"},{"line_number":78,"context_line":"         PD_On (Aux);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"951ebf81_00f3a4f6","line":75,"in_reply_to":"8aefe243_ef64cc9b","updated":"2026-06-25 15:37:39.000000000","message":"*nods*\n\nIt\u0027s easier to turn on all power, set up the display and only then power off unused things.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"}],"common/tigerlake/xelpd/hw-gfx-gma-power_domains.ads":[{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"340690623a036fa345b5d94f1d469b00b677feb4","unresolved":false,"context_lines":[{"line_number":20,"context_line":"   -- Previous platforms required that PG(n-1) be enabled before PG(n).  That"},{"line_number":21,"context_line":"   -- dependency chain turns into a dependency tree on XE_LPD:"},{"line_number":22,"context_line":"   --"},{"line_number":23,"context_line":"   --       PG0"},{"line_number":24,"context_line":"   --        |"},{"line_number":25,"context_line":"   --     --PG1--"},{"line_number":26,"context_line":"   --    /       \\"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"ff4c5486_c10d2140","line":23,"range":{"start_line":23,"start_character":12,"end_line":23,"end_character":15},"updated":"2026-06-14 16:22:29.000000000","message":"Is PG0/PW0 always enabled?","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"05f816b50440ff3d8136dec0b12505f2ead295bc","unresolved":false,"context_lines":[{"line_number":20,"context_line":"   -- Previous platforms required that PG(n-1) be enabled before PG(n).  That"},{"line_number":21,"context_line":"   -- dependency chain turns into a dependency tree on XE_LPD:"},{"line_number":22,"context_line":"   --"},{"line_number":23,"context_line":"   --       PG0"},{"line_number":24,"context_line":"   --        |"},{"line_number":25,"context_line":"   --     --PG1--"},{"line_number":26,"context_line":"   --    /       \\"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"c2ef332c_1a1e0284","line":23,"range":{"start_line":23,"start_character":12,"end_line":23,"end_character":15},"in_reply_to":"8a672b61_bac3602a","updated":"2026-06-25 15:37:39.000000000","message":"It might be controlled by the iGPU being enabled at all.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"70bd161f11fd04b6c6096cd24d5638597ec70555","unresolved":false,"context_lines":[{"line_number":20,"context_line":"   -- Previous platforms required that PG(n-1) be enabled before PG(n).  That"},{"line_number":21,"context_line":"   -- dependency chain turns into a dependency tree on XE_LPD:"},{"line_number":22,"context_line":"   --"},{"line_number":23,"context_line":"   --       PG0"},{"line_number":24,"context_line":"   --        |"},{"line_number":25,"context_line":"   --     --PG1--"},{"line_number":26,"context_line":"   --    /       \\"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"8a672b61_bac3602a","line":23,"range":{"start_line":23,"start_character":12,"end_line":23,"end_character":15},"in_reply_to":"ff4c5486_c10d2140","updated":"2026-06-15 21:13:15.000000000","message":"To us, yes. I\u0027m guessing its firmware controlled. PG1 is software controlled,\nbut should be on as long as the driver runs. Hence PG1 handled below but not\npart of `Dynamic_Domains`.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"340690623a036fa345b5d94f1d469b00b677feb4","unresolved":true,"context_lines":[{"line_number":32,"context_line":"   -- to top.  This allows pipes to be power gated independently."},{"line_number":33,"context_line":""},{"line_number":34,"context_line":"   type Power_Domain is"},{"line_number":35,"context_line":"     (PW1, PWA, PW2, PWB, PWC, PWD,"},{"line_number":36,"context_line":"      -- order matters, bit positions for D \u0026 E replace USBC5 \u0026 6 from TGL:"},{"line_number":37,"context_line":"      AUX_A, AUX_B, AUX_C, AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_D, AUX_E,"},{"line_number":38,"context_line":"      DDI_A, DDI_B, DDI_C, DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_D, DDI_E);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"4bbc3c36_79b87d26","line":35,"range":{"start_line":35,"start_character":6,"end_line":35,"end_character":35},"updated":"2026-06-14 16:22:29.000000000","message":"Should this be consistent with the names in the comment?","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"70bd161f11fd04b6c6096cd24d5638597ec70555","unresolved":true,"context_lines":[{"line_number":32,"context_line":"   -- to top.  This allows pipes to be power gated independently."},{"line_number":33,"context_line":""},{"line_number":34,"context_line":"   type Power_Domain is"},{"line_number":35,"context_line":"     (PW1, PWA, PW2, PWB, PWC, PWD,"},{"line_number":36,"context_line":"      -- order matters, bit positions for D \u0026 E replace USBC5 \u0026 6 from TGL:"},{"line_number":37,"context_line":"      AUX_A, AUX_B, AUX_C, AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_D, AUX_E,"},{"line_number":38,"context_line":"      DDI_A, DDI_B, DDI_C, DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_D, DDI_E);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"4e207d0a_7c30b5be","line":35,"range":{"start_line":35,"start_character":6,"end_line":35,"end_character":35},"in_reply_to":"4bbc3c36_79b87d26","updated":"2026-06-15 21:13:15.000000000","message":"Which would you prefer? It seems Intel\u0027s documentation uses \"power well\" when\nwritten out and PGx when used as an acronym *shrug*. i915 seems to use both\nacronyms.\n\nI\u0027d say adapt the comment, i.e. use PWx consistently?","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"05f816b50440ff3d8136dec0b12505f2ead295bc","unresolved":true,"context_lines":[{"line_number":32,"context_line":"   -- to top.  This allows pipes to be power gated independently."},{"line_number":33,"context_line":""},{"line_number":34,"context_line":"   type Power_Domain is"},{"line_number":35,"context_line":"     (PW1, PWA, PW2, PWB, PWC, PWD,"},{"line_number":36,"context_line":"      -- order matters, bit positions for D \u0026 E replace USBC5 \u0026 6 from TGL:"},{"line_number":37,"context_line":"      AUX_A, AUX_B, AUX_C, AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_D, AUX_E,"},{"line_number":38,"context_line":"      DDI_A, DDI_B, DDI_C, DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_D, DDI_E);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"a82672ef_dbc1891a","line":35,"range":{"start_line":35,"start_character":6,"end_line":35,"end_character":35},"in_reply_to":"4e207d0a_7c30b5be","updated":"2026-06-25 15:37:39.000000000","message":"Sounds good, commit message should also be adapted. AFAIK PG stands for Power Gate.","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"8b8a94d701956c006e43e4ef0221966bcc2c0461","unresolved":false,"context_lines":[{"line_number":32,"context_line":"   -- to top.  This allows pipes to be power gated independently."},{"line_number":33,"context_line":""},{"line_number":34,"context_line":"   type Power_Domain is"},{"line_number":35,"context_line":"     (PW1, PWA, PW2, PWB, PWC, PWD,"},{"line_number":36,"context_line":"      -- order matters, bit positions for D \u0026 E replace USBC5 \u0026 6 from TGL:"},{"line_number":37,"context_line":"      AUX_A, AUX_B, AUX_C, AUX_USBC1, AUX_USBC2, AUX_USBC3, AUX_USBC4, AUX_D, AUX_E,"},{"line_number":38,"context_line":"      DDI_A, DDI_B, DDI_C, DDI_USBC1, DDI_USBC2, DDI_USBC3, DDI_USBC4, DDI_D, DDI_E);"}],"source_content_type":"application/octet-stream","patch_set":4,"id":"272a23f1_d34e2bbd","line":35,"range":{"start_line":35,"start_character":6,"end_line":35,"end_character":35},"in_reply_to":"a82672ef_dbc1891a","updated":"2026-07-07 12:03:00.000000000","message":"Done","commit_id":"fed7f4fb966c0b062f113b8d8529371ae2226a3c"}]}