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There was no\nprogrammer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n  they advertise the whole default set (PAR, LPC, FWH), they only pro-\n  vide a maximum decode size for one of them. The latter is probably\n  wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n  the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. 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There was no\nprogrammer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n  they advertise the whole default set (PAR, LPC, FWH), they only pro-\n  vide a maximum decode size for one of them. The latter is probably\n  wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n  the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. 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There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n  they advertise the whole default set (PAR, LPC, FWH), they only pro-\n  vide a maximum decode size for one of them. The latter is probably\n  wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n  the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. 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There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n  they advertise the whole default set (PAR, LPC, FWH), they only pro-\n  vide a maximum decode size for one of them. The latter is probably\n  wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n  the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. The existing code around this also only tried to provide\nthe best possible warning message at the expense of breaking the pro-\ngrammer abstraction.\n\nHence, unify the set of sizes into a single `max_rom_decode` property.\nWe store it inside the `registered_master` struct right away, to avoid\nany more use of globals.\n\nChange-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\n","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/c1385e4fbdfc30692c1fdc9d7ec8f55f5f806277"}]},"branch":"refs/heads/main"},"89569d60e3aeeec651496b2e7a2e6064d782ab3b":{"kind":"TRIVIAL_REBASE_WITH_MESSAGE_UPDATE","_number":5,"created":"2024-03-09 10:30:24.000000000","uploader":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"ref":"refs/changes/31/72531/5","fetch":{"anonymous http":{"url":"https://review.sourcearcade.org/flashprog","ref":"refs/changes/31/72531/5","commands":{"Branch":"git fetch https://review.sourcearcade.org/flashprog refs/changes/31/72531/5 \u0026\u0026 git checkout -b change-72531 FETCH_HEAD","Checkout":"git fetch https://review.sourcearcade.org/flashprog refs/changes/31/72531/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.sourcearcade.org/flashprog refs/changes/31/72531/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.sourcearcade.org/flashprog refs/changes/31/72531/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.sourcearcade.org/flashprog refs/changes/31/72531/5","Reset To":"git fetch https://review.sourcearcade.org/flashprog refs/changes/31/72531/5 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"929d2e1b17a448d3352dbecb6a620ee0c1e65a58","subject":"internal: Pass programmer context down into chipset enables","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/929d2e1b17a448d3352dbecb6a620ee0c1e65a58"}]}],"author":{"name":"Nico Huber","email":"nico.h@gmx.de","date":"2023-01-12 22:31:40.000000000","tz":60},"committer":{"name":"Nico Huber","email":"nico.h@gmx.de","date":"2024-03-09 10:30:24.000000000","tz":0},"subject":"memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`","message":"memory_mapped: Reduce `decode_sizes` to a single `max_rom_decode`\n\nWe used to store the maximum decode size, i.e. the maximum memory-mapped\nrange of the flash chip, per bus type (Parallel, LPC, FWH, SPI). There\nwas no programmer in the tree that really made use of it, though:\n* The chipset drivers usually focus on a single bus type. And even if\n  they advertise the whole default set (PAR, LPC, FWH), they only pro-\n  vide a maximum decode size for one of them. The latter is probably\n  wrong, should really more than one bus type be supported.\n* PCI and external programmers all support only a single bus type, with\n  the exception of `serprog` which doesn\u0027t set a maximum decode size.\n\nWhat made the distinction even less useful is that for some chips that\nsupport multiple bus types, i.e. LPC+FWH, we can\u0027t even detect which\ntype it is. The existing code around this also only tried to provide\nthe best possible warning message at the expense of breaking the pro-\ngrammer abstraction.\n\nHence, unify the set of sizes into a single `max_rom_decode` property.\nWe store it inside the `registered_master` struct right away, to avoid\nany more use of globals.\n\nChange-Id: I2aaea18d5b4255eb843a625b016ee74bb145ed85\nSigned-off-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/72531\n","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/89569d60e3aeeec651496b2e7a2e6064d782ab3b"}]},"branch":"refs/heads/main","description":"Rebase"}},"requirements":[],"submit_records":[{"rule_name":"gerrit~DefaultSubmitRule","status":"CLOSED","labels":[{"label":"Code-Review","status":"OK","applied_by":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]}},{"label":"Verified","status":"OK","applied_by":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]}}]}],"submit_requirements":[{"name":"Verified","status":"SATISFIED","is_legacy":true,"submittability_expression_result":{"expression":"label:Verified\u003dMAX -label:Verified\u003dMIN","fulfilled":true,"status":"PASS","passing_atoms":["label:Verified\u003dMAX","-label:Verified\u003dMIN"],"failing_atoms":[],"atom_explanations":{}}},{"name":"Code-Review","status":"SATISFIED","is_legacy":true,"submittability_expression_result":{"expression":"label:Code-Review\u003dMAX -label:Code-Review\u003dMIN","fulfilled":true,"status":"PASS","passing_atoms":["label:Code-Review\u003dMAX","-label:Code-Review\u003dMIN"],"failing_atoms":[],"atom_explanations":{}}}]}