)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000003,"name":"Arthur Heymans","email":"arthur@aheymans.xyz","username":"arthurheymans","avatars":[{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"bae1fc9b4c37a18d0286ab707e04abada7391cc1","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Perform default mapping only for respective chips"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"The default memory mapping for the whole flash chip only makes sense"},{"line_number":10,"context_line":"for chips that are directly connected to a bus serving memory cycles,"},{"line_number":11,"context_line":"i.e. parallel, LPC and FWH chips. Use the new `.prepare_access` and"},{"line_number":12,"context_line":"`.finish_access` hooks to map/unmap respective chips."},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"Going through the chip driver for this allows us to free the core"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":2,"id":"d465e383_8257ede4","line":11,"range":{"start_line":9,"start_character":0,"end_line":11,"end_character":33},"updated":"2023-05-10 14:22:56.000000000","message":"What about serprog programmers that can program flashchips over these busses?","commit_id":"dc4dcc7122b21979eea413807b074619a421a680"},{"author":{"_account_id":1000003,"name":"Arthur Heymans","email":"arthur@aheymans.xyz","username":"arthurheymans","avatars":[{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"a6594219942db603450851837de4292a02ab5463","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"Perform default mapping only for respective chips"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"The default memory mapping for the whole flash chip only makes sense"},{"line_number":10,"context_line":"for chips that are directly connected to a bus serving memory cycles,"},{"line_number":11,"context_line":"i.e. parallel, LPC and FWH chips. Use the new `.prepare_access` and"},{"line_number":12,"context_line":"`.finish_access` hooks to map/unmap respective chips."},{"line_number":13,"context_line":""},{"line_number":14,"context_line":"Going through the chip driver for this allows us to free the core"}],"source_content_type":"text/x-gerrit-commit-message","patch_set":2,"id":"ca67c575_0ff6ca9e","line":11,"range":{"start_line":9,"start_character":0,"end_line":11,"end_character":33},"in_reply_to":"d465e383_8257ede4","updated":"2023-05-10 14:24:18.000000000","message":"\u003e What about serprog programmers that can program flashchips over these busses?\n\nI saw the next patch :-D","commit_id":"dc4dcc7122b21979eea413807b074619a421a680"}],"/PATCHSET_LEVEL":[{"author":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"fce29af949613a135cba5773512945f866906013","unresolved":false,"context_lines":[],"source_content_type":"","patch_set":4,"id":"96e791cb_1c814e0d","updated":"2024-03-08 18:17:16.000000000","message":"Reviving +2 lost due to manual rebase.","commit_id":"3e9aa12de51e9878bbe70c12e987bf0a7b27ae28"}]}