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You don\u0027t write its value directly, issuing special write commands\nwith no data set separate OTP bits to 1 automatically (WRSCUR, WPSEL\ncommands). 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You don\u0027t write its value directly, issuing special write commands\nwith no data set separate OTP bits to 1 automatically (WRSCUR, WPSEL\ncommands). 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You don\u0027t write its value directly, issuing special write commands\nwith no data set separate OTP bits to 1 automatically (WRSCUR, WPSEL\ncommands). No WREN is necessary, but at least some datasheets indicate\nBUSY state after those write commands.\n\nUnlike cases where OTP bit is part of SR and can only be written while\nin OTP mode, security register can only be written outside of the mode.\n\nThe register is found in at least these chips by Macronix:\n * MX25L6436E\n * MX25L6445E\n * MX25L6465E\n * MX25L6473E\n\nChange-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59709\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\n","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/c4dec0b26e6f42f314f039a7aedff25a66405066"}]},"branch":"refs/heads/main"},"a76edde8ee6e2f49ff8e1de923bf7b172663d255":{"kind":"REWORK","_number":4,"created":"2024-07-07 13:10:09.000000000","uploader":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"ref":"refs/changes/06/71006/4","fetch":{"anonymous http":{"url":"https://review.sourcearcade.org/flashprog","ref":"refs/changes/06/71006/4","commands":{"Branch":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/4 \u0026\u0026 git checkout -b change-71006 FETCH_HEAD","Checkout":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/4 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/4 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/4 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.sourcearcade.org/flashprog refs/changes/06/71006/4","Reset To":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/4 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"05f04cbcbee98fe8d4b7c436c39833d4b64e8389","subject":"flashchips: Split W25Q64.W -\u003e W25Q64DW | W25Q64FW/W25Q64JW...Q","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/05f04cbcbee98fe8d4b7c436c39833d4b64e8389"}]}],"author":{"name":"Sergii Dmytruk","email":"sergii.dmytruk@3mdeb.com","date":"2021-11-27 13:14:27.000000000","tz":120},"committer":{"name":"Nico Huber","email":"nico.h@gmx.de","date":"2024-07-07 12:46:09.000000000","tz":120},"subject":"spi25_statusreg.c: support reading security register","message":"spi25_statusreg.c: support reading security register\n\nNot to be confused with \"secure registers\" of OTP.\n\nSecurity register is a dedicated status register for security-related\nbits. You don\u0027t write its value directly, issuing special write commands\nwith no data set separate OTP bits to 1 automatically (WRSCUR, WPSEL\ncommands). No WREN is necessary, but at least some datasheets indicate\nBUSY state after those write commands.\n\nUnlike cases where OTP bit is part of SR and can only be written while\nin OTP mode, security register can only be written outside of the mode.\n\nThe register is found in at least these chips by Macronix:\n * MX25L6436E\n * MX25L6445E\n * MX25L6465E\n * MX25L6473E\n\nPorted to flashprog w/o the FEATURE_SCUR flag, we\u0027ll already have that\ninformation in the register description.\n\nChange-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59709\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\n","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/a76edde8ee6e2f49ff8e1de923bf7b172663d255"}]},"branch":"refs/heads/main"},"3d728e7524fe086e90779ea76bf2f9bd02cdf6de":{"kind":"TRIVIAL_REBASE_WITH_MESSAGE_UPDATE","_number":5,"created":"2024-07-22 10:08:47.000000000","uploader":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"ref":"refs/changes/06/71006/5","fetch":{"anonymous http":{"url":"https://review.sourcearcade.org/flashprog","ref":"refs/changes/06/71006/5","commands":{"Branch":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/5 \u0026\u0026 git checkout -b change-71006 FETCH_HEAD","Checkout":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/5 \u0026\u0026 git checkout FETCH_HEAD","Cherry Pick":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/5 \u0026\u0026 git cherry-pick FETCH_HEAD","Format Patch":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/5 \u0026\u0026 git format-patch -1 --stdout FETCH_HEAD","Pull":"git pull https://review.sourcearcade.org/flashprog refs/changes/06/71006/5","Reset To":"git fetch https://review.sourcearcade.org/flashprog refs/changes/06/71006/5 \u0026\u0026 git reset --hard FETCH_HEAD"}}},"commit":{"parents":[{"commit":"a358b14d2e7e93e317499a687223ada2d221a36a","subject":"flashchips: Split W25Q64.W -\u003e W25Q64DW | W25Q64FW/W25Q64JW...Q","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/a358b14d2e7e93e317499a687223ada2d221a36a"}]}],"author":{"name":"Sergii Dmytruk","email":"sergii.dmytruk@3mdeb.com","date":"2021-11-27 13:14:27.000000000","tz":120},"committer":{"name":"Nico Huber","email":"nico.h@gmx.de","date":"2024-07-22 10:08:47.000000000","tz":0},"subject":"spi25_statusreg.c: support reading security register","message":"spi25_statusreg.c: support reading security register\n\nNot to be confused with \"secure registers\" of OTP.\n\nSecurity register is a dedicated status register for security-related\nbits. You don\u0027t write its value directly, issuing special write commands\nwith no data set separate OTP bits to 1 automatically (WRSCUR, WPSEL\ncommands). No WREN is necessary, but at least some datasheets indicate\nBUSY state after those write commands.\n\nUnlike cases where OTP bit is part of SR and can only be written while\nin OTP mode, security register can only be written outside of the mode.\n\nThe register is found in at least these chips by Macronix:\n * MX25L6436E\n * MX25L6445E\n * MX25L6465E\n * MX25L6473E\n\nPorted to flashprog w/o the FEATURE_SCUR flag, we\u0027ll already have that\ninformation in the register description.\n\nChange-Id: Iae1753ca4cb051127a5bcbeba7f064053adb8dae\nSigned-off-by: Sergii Dmytruk \u003csergii.dmytruk@3mdeb.com\u003e\nOriginal-Reviewed-on: https://review.coreboot.org/c/flashrom/+/59709\nOriginal-Reviewed-by: Angel Pons \u003cth3fanbus@gmail.com\u003e\nOriginal-Reviewed-by: Edward O\u0027Callaghan \u003cquasisec@chromium.org\u003e\nOriginal-Reviewed-by: Nikolai Artemiev \u003cnartemiev@google.com\u003e\nReviewed-on: https://review.sourcearcade.org/c/flashprog/+/71006\nReviewed-by: Nico Huber \u003cnico.h@gmx.de\u003e\nReviewed-by: Arthur Heymans \u003carthur@aheymans.xyz\u003e\nTested-by: Nico Huber \u003cnico.h@gmx.de\u003e\n","web_links":[{"name":"browse","url":"/plugins/gitiles/flashprog/+/3d728e7524fe086e90779ea76bf2f9bd02cdf6de"}]},"branch":"refs/heads/main","description":"Rebase"}},"requirements":[],"submit_records":[{"rule_name":"gerrit~DefaultSubmitRule","status":"CLOSED","labels":[{"label":"Code-Review","status":"OK","applied_by":{"_account_id":1000003,"name":"Arthur Heymans","email":"arthur@aheymans.xyz","username":"arthurheymans","avatars":[{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/518bb7353a0a42df698e1736723abc9f.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]}},{"label":"Verified","status":"OK","applied_by":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]}}]}],"submit_requirements":[{"name":"Verified","status":"SATISFIED","is_legacy":true,"submittability_expression_result":{"expression":"label:Verified\u003dMAX -label:Verified\u003dMIN","fulfilled":true,"status":"PASS","passing_atoms":["label:Verified\u003dMAX","-label:Verified\u003dMIN"],"failing_atoms":[],"atom_explanations":{}}},{"name":"Code-Review","status":"SATISFIED","is_legacy":true,"submittability_expression_result":{"expression":"label:Code-Review\u003dMAX -label:Code-Review\u003dMIN","fulfilled":true,"status":"PASS","passing_atoms":["label:Code-Review\u003dMAX","-label:Code-Review\u003dMIN"],"failing_atoms":[],"atom_explanations":{}}}]}