)]}'
{"/COMMIT_MSG":[{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"4045bae7d3d20fe27a442de4614664fa07916631","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"ich_descriptors: Hard code number of masters for newer gens"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"The number of masters (NM) field is ignored by the hardware and often"},{"line_number":10,"context_line":"not updated in Intel\u0027s tooling.  Since PCH100 / Skylake,  it\u0027s always"},{"line_number":11,"context_line":"been 2 masters for the small core, 5 for the big core,  and 6 for the"},{"line_number":12,"context_line":"server platforms."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"cc23f7a7_6ad755cf","line":9,"updated":"2024-11-05 21:54:59.000000000","message":"Is the value of this field shown anywhere in the logs? It\u0027d be useful to log it (even if at a verbose log level) in case someone encounters a weird configuration in the wild.","commit_id":"1e95cd04275f12224d609a29e09a4b7ab599b108"},{"author":{"_account_id":1000012,"name":"Angel Pons","email":"th3fanbus@gmail.com","username":"th3fanbus","avatars":[{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/61cdfc186d8caca5a8908b0a382de6d8.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"48bc6e6b1bb0f86bf5b05a938cb8c253a91910e9","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"ich_descriptors: Hard code number of masters for newer gens"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"The number of masters (NM) field is ignored by the hardware and often"},{"line_number":10,"context_line":"not updated in Intel\u0027s tooling.  Since PCH100 / Skylake,  it\u0027s always"},{"line_number":11,"context_line":"been 2 masters for the small core, 5 for the big core,  and 6 for the"},{"line_number":12,"context_line":"server platforms."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"347321ea_34404fa7","line":9,"in_reply_to":"22ce1ff5_bda89c8f","updated":"2024-11-06 10:50:48.000000000","message":"Ack","commit_id":"1e95cd04275f12224d609a29e09a4b7ab599b108"},{"author":{"_account_id":1000000,"name":"Nico Huber","email":"nico.h@gmx.de","username":"icon","avatars":[{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d32","height":32},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d56","height":56},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d100","height":100},{"url":"https://www.gravatar.com/avatar/60d420b5d650d48b86d6921a9f683b64.jpg?d\u003didenticon\u0026r\u003dpg\u0026s\u003d120","height":120}]},"change_message_id":"7555166beeccacdab6f2bc992dc8bba2a5494af5","unresolved":false,"context_lines":[{"line_number":6,"context_line":""},{"line_number":7,"context_line":"ich_descriptors: Hard code number of masters for newer gens"},{"line_number":8,"context_line":""},{"line_number":9,"context_line":"The number of masters (NM) field is ignored by the hardware and often"},{"line_number":10,"context_line":"not updated in Intel\u0027s tooling.  Since PCH100 / Skylake,  it\u0027s always"},{"line_number":11,"context_line":"been 2 masters for the small core, 5 for the big core,  and 6 for the"},{"line_number":12,"context_line":"server platforms."}],"source_content_type":"text/x-gerrit-commit-message","patch_set":3,"id":"22ce1ff5_bda89c8f","line":9,"in_reply_to":"cc23f7a7_6ad755cf","updated":"2024-11-06 10:31:41.000000000","message":"Yes, as part of raw FLMAP1 it\u0027s printed at DEBUG2. That\u0027s two `-V` and\nin all `-o` logfiles. Interpretation would be hard though, not knowing\nif a/which tool would care about the value at all.","commit_id":"1e95cd04275f12224d609a29e09a4b7ab599b108"}]}